Datasheet LT6300 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | 500mA, 200MHz xDSL Line Driver in 16-Lead SSOP Package |
| Seiten / Seite | 16 / 7 — APPLICATIO S I FOR ATIO. Setting the Quiescent Operating Current. Figure … |
| Dateiformat / Größe | PDF / 240 Kb |
| Dokumentensprache | Englisch |
APPLICATIO S I FOR ATIO. Setting the Quiescent Operating Current. Figure 1. Internal Current Biasing Circuitry
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LT6300
U U W U APPLICATIO S I FOR ATIO
The LT6300 is a high speed, 200MHz gain bandwidth
Setting the Quiescent Operating Current
product, dual voltage feedback amplifier with high output Power consumption and dissipation are critical concerns current drive capability, 500mA source and sink. The in multiport xDSL applications. Two pins, Shutdown LT6300 is ideal for use as a line driver in xDSL data (SHDN) and Shutdown Reference (SHDNREF), are pro- communication applications. The output voltage swing vided to control quiescent power consumption and allow has been optimized to provide sufficient headroom when for the complete shutdown of the driver. The quiescent operating from ±12V power supplies in full-rate ADSL current should be set high enough to prevent distortion applications. The LT6300 also allows for an adjustment of induced errors in a particular application, but not so high the operating current to minimize power consumption. In that power is wasted in the driver unnecessarily. A good addition, the LT6300 is available in a small footprint starting point to evaluate the LT6300 is to set the quiescent surface mount package to minimize PCB area. current to 10mA per amplifier. To minimize signal distortion, the LT6300 amplifiers are The internal biasing circuitry is shown in Figure 1. Ground- decompensated to provide very high open-loop gain at ing the SHDNREF pin and directly driving the SHDN pin with high frequency. As a result each amplifier is frequency a voltage can control the operating current as seen in the stable with a closed-loop gain of 10 or more. If a closed- Typical Performance Characteristics. When the SHDN pin loop gain of less than 10 is desired, external frequency is less than SHDNREF + 0.4V, the driver is shut down and compensating components can be used. consumes typically only 100µA of supply current and the SHDN outputs are in a high impedance state. Part to part varia- tions, however, will cause inconsistent control of the qui- 5I 2k escent current if direct voltage drive of the SHDN pin is used. I 2I 2I Using a single external resistor, RBIAS, connected in one of two ways provides a much more predictable control of the quiescent supply current. Figure 2 illustrates the effect on 1k supply current per amplifier with R TO BIAS connected be- START-UP tween the SHDN pin and the 12V V+ supply of the LT6300 CIRCUITRY IBIAS TO AMPLIFIERS and the approximate design equations. Figure 3 illustrates BIAS CIRCUITRY SHDNREF 6300 F01 the same control with RBIAS connected between the 2 IBIAS = ISHDN = ISHDNREF SHDNREF pin and ground while the SHDN pin is tied to V+. 5 ISUPPLY PER AMPLIFIER (mA) = 64 • IBIAS Either approach is equally effective.
Figure 1. Internal Current Biasing Circuitry
30 VS = ±12V V+ = 12V 25 RBIAS SHDN 20 V+ – 1.2V IS PER AMPLIFIER (mA) ≈ • 25.6 RBIAS + 2k 15 R V+ – 1.2V PER AMPLIFIER (mA) BIAS = • 25.6 – 2k I 10 S PER AMPLIFIER (mA) SHDNREF I SUPPLY 5 0 7 10 40 70 100 130 160 190 RBIAS (kΩ) 6300 F02
Figure 2. RBIAS to V+ Current Control
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U U W U APPLICATIO S I FOR ATIO
The LT6300 is a high speed, 200MHz gain bandwidth
Setting the Quiescent Operating Current
product, dual voltage feedback amplifier with high output Power consumption and dissipation are critical concerns current drive capability, 500mA source and sink. The in multiport xDSL applications. Two pins, Shutdown LT6300 is ideal for use as a line driver in xDSL data (SHDN) and Shutdown Reference (SHDNREF), are pro- communication applications. The output voltage swing vided to control quiescent power consumption and allow has been optimized to provide sufficient headroom when for the complete shutdown of the driver. The quiescent operating from ±12V power supplies in full-rate ADSL current should be set high enough to prevent distortion applications. The LT6300 also allows for an adjustment of induced errors in a particular application, but not so high the operating current to minimize power consumption. In that power is wasted in the driver unnecessarily. A good addition, the LT6300 is available in a small footprint starting point to evaluate the LT6300 is to set the quiescent surface mount package to minimize PCB area. current to 10mA per amplifier. To minimize signal distortion, the LT6300 amplifiers are The internal biasing circuitry is shown in Figure 1. Ground- decompensated to provide very high open-loop gain at ing the SHDNREF pin and directly driving the SHDN pin with high frequency. As a result each amplifier is frequency a voltage can control the operating current as seen in the stable with a closed-loop gain of 10 or more. If a closed- Typical Performance Characteristics. When the SHDN pin loop gain of less than 10 is desired, external frequency is less than SHDNREF + 0.4V, the driver is shut down and compensating components can be used. consumes typically only 100µA of supply current and the SHDN outputs are in a high impedance state. Part to part varia- tions, however, will cause inconsistent control of the qui- 5I 2k escent current if direct voltage drive of the SHDN pin is used. I 2I 2I Using a single external resistor, RBIAS, connected in one of two ways provides a much more predictable control of the quiescent supply current. Figure 2 illustrates the effect on 1k supply current per amplifier with R TO BIAS connected be- START-UP tween the SHDN pin and the 12V V+ supply of the LT6300 CIRCUITRY IBIAS TO AMPLIFIERS and the approximate design equations. Figure 3 illustrates BIAS CIRCUITRY SHDNREF 6300 F01 the same control with RBIAS connected between the 2 IBIAS = ISHDN = ISHDNREF SHDNREF pin and ground while the SHDN pin is tied to V+. 5 ISUPPLY PER AMPLIFIER (mA) = 64 • IBIAS Either approach is equally effective.
Figure 1. Internal Current Biasing Circuitry
30 VS = ±12V V+ = 12V 25 RBIAS SHDN 20 V+ – 1.2V IS PER AMPLIFIER (mA) ≈ • 25.6 RBIAS + 2k 15 R V+ – 1.2V PER AMPLIFIER (mA) BIAS = • 25.6 – 2k I 10 S PER AMPLIFIER (mA) SHDNREF I SUPPLY 5 0 7 10 40 70 100 130 160 190 RBIAS (kΩ) 6300 F02
Figure 2. RBIAS to V+ Current Control
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