LT1217 OUUWUAPPLICATIS I FOR ATIOOffset AdjustLarge Signal Response, AV = 2, RF = RG = 3k,Slew Rate 500V/ µ s Output offset voltage is equal to the input offset voltage times the gain plus the inverting input bias current times the feedback resistor. The LT1217 output offset voltage can be nulled by pulling approximately 30µA from pin 1 or 5. The easy way to do this is to use a 100kΩ pot between pin 1 and 5 with a 430kΩ resistor from the wiper to ground for 15V supply applications. Use a 110k resistor when operating on a 5V supply. Shutdown Pin 8 activates a shutdown control function. Pulling more than 50µA from pin 8 drops the supply current to less than 350µA, and puts the output into a high impedance state. The easy way to force shutdown is to ground pin 8, using Large Signal Response, AV = –2, RF = 3k, RG = 1.5k,Slew Rate 850V/ µ s an open collector (drain) logic stage. An internal resistor limits current, allowing direct interfacing with no addi- tional parts. When pin 8 is open, the LT1217 operates normally. Slew Rate The slew rate of a current feedback amplifier is not independent of the amplifier gain configuration the way it is in a traditional op amp. This is because the input stage and the output stage both have slew rate limitations. Inverting amplifiers do not slew the input and are therefore limited only by the output stage. High gain, non-inverting amplifiers are similar. The input stage slew rate of the LT1217 is about 50V/µs before it becomes non-linear and Large Signal Response, AV = 10, RF = 3k, RG = 330 Ω , is enhanced by the normally reverse biased emitters on the Slew Rate 150V/ µ s input transistors. The output slew rate depends on the size of the feedback resistors. The output slew rate is about 850V/µs with a 3k feedback resistor and drops propor- tionally for larger values. The photos show the LT1217 with a 20V peak-to-peak output swing for three different gain configurations. Settling Time The characteristic curves show that the LT1217 settles to within 10mV of final value in less than 300ns for any output step up to 10V. Settling to 1mV of final value takes less than 500ns. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7