Datasheet AD8351 (Analog Devices) - 10

AD8351 Data Sheet 4000 0 3500 ) 3000 –25 (Ω UDE T 2500 NI rees) AG eg 2000 –50 D M ( E S 1500 A H 3GHz 10MHz 10MHz DANCE P E P 1000 –75 IM 500MHz 500MHz 3GHz WITH 50Ω 500 TERMINATIONS 0 –100 WITHOUT
1
10 100 1000 TERMINATIONS
-02
FREQUENCY (MHz)
145 03 24 0 45- 031 Figure 22. Input Impedance vs. Frequency Figure 25. Input Reflection Coefficient vs. Frequency (RS = RL = 100 Ω With and Without 50 Ω Terminations)
160 30 150 25 ) (Ω rees) 140 20 UDE eg T (D NI E AG 130 15 HAS M P 500MHz 120 10 DANCE E DANCE P E P 10MHz IM IM 110 5 100 0 3GHz
2
10 100 1000
-02
FREQUENCY (MHz)
145 03 025 45- 031 Figure 23. Output Impedance vs. Frequency Figure 26. Output Reflection Coefficient vs. Frequency (RS = RL = 100 Ω)
0 20 19 –2 18 17 –4 16 15 ) –6 14 s) 13 (p rees Y –8 12 A eg 11 L D E ( 10 E D –10 9 P HAS 8 OU P –12 7 GR 6 –14 5 4 –16 3 1 –18 0 0 25 50 75 100 125 150 175 200 225 250
023 5-
FREQUENCY (MHz)
0314 Figure 24. Phase and Group Delay (AV = 10 dB, at 5 V Supplies) Rev. D | Page 10 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC CONCEPTS GAIN ADJUSTMENT COMMON-MODE ADJUSTMENT INPUT AND OUTPUT MATCHING SINGLE-ENDED-TO-DIFFERENTIAL OPERATION ADC DRIVING ANALOG MULTIPLEXING I/O CAPACITIVE LOADING TRANSMISSION LINE EFFECTS CHARACTERIZATION SETUP EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE