Datasheet LT6600-5 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | Very Low Noise, Differential Amplifier and 5MHz Lowpass Filter |
| Seiten / Seite | 12 / 6 — PIN FUNCTIONS. IN– and IN+ (Pins 1, 8):. OUT+ and OUT– (Pins 4, 5):. VOCM … |
| Dateiformat / Größe | PDF / 158 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. IN– and IN+ (Pins 1, 8):. OUT+ and OUT– (Pins 4, 5):. VOCM (Pin 2):. MID (Pin 7):. V+ and V – (Pins 3, 6):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LT6600-5
PIN FUNCTIONS IN– and IN+ (Pins 1, 8):
Input Pins. Signals can be ap- applications, bypass Pin 3 to ground and Pin 6 to ground plied to either or both input pins through identical external with a quality 0.1μF ceramic capacitor. resistors, RIN. The DC gain from differential inputs to the
OUT+ and OUT– (Pins 4, 5):
Output Pins. Pins 4 and 5 are differential outputs is 806Ω/RIN. the fi lter differential outputs. Each pin can drive a 100Ω
VOCM (Pin 2):
Is the DC Common Mode Reference Voltage and/or 50pF load to AC ground. for the 2nd Filter Stage. Its value programs the common
V
mode voltage of the differential output of the fi lter. Pin 2 is a
MID (Pin 7):
The VMID pin is internally biased at mid- supply, see block diagram. For single supply operation high impedance input, which can be driven from an external the V voltage reference, or Pin 2 can be tied to Pin 7 on the PC MID pin should be bypassed with a quality 0.01μF ceramic capacitor to Pin 6. For dual supply operation, board. Pin 2 should be bypassed with a 0.01μF ceramic Pin 7 can be bypassed or connected to a high quality DC capacitor unless it is connected to a ground plane. ground. A ground plane should be used. A poor ground
V+ and V – (Pins 3, 6):
Power Supply Pins
.
For a single will increase noise and distortion. Pin 7 sets the output 3.3V or 5V supply (Pin 6 grounded) a quality 0.1μF ceramic common mode voltage of the 1st stage of the fi lter. It has bypass capacitor is required from the positive supply pin a 5.5kΩ impedance, and it can be overridden with an (Pin 3) to the negative supply pin (Pin 6). The bypass external low impedance voltage source. should be as close as possible to the IC. For dual supply
BLOCK DIAGRAM
RIN V + IN IN+ OUT– V– VMID 8 7 6 5 V+ 11k PROPRIETARY LOWPASS 806Ω FILTER STAGE 11k 400Ω V– OP AMP 400Ω + – + – V V OCM OCM – + – + 400Ω 400Ω 806Ω 1 2 3 4 66005 BD V – IN V IN– OCM V+ OUT+ RIN 66005fb 6
PIN FUNCTIONS IN– and IN+ (Pins 1, 8):
Input Pins. Signals can be ap- applications, bypass Pin 3 to ground and Pin 6 to ground plied to either or both input pins through identical external with a quality 0.1μF ceramic capacitor. resistors, RIN. The DC gain from differential inputs to the
OUT+ and OUT– (Pins 4, 5):
Output Pins. Pins 4 and 5 are differential outputs is 806Ω/RIN. the fi lter differential outputs. Each pin can drive a 100Ω
VOCM (Pin 2):
Is the DC Common Mode Reference Voltage and/or 50pF load to AC ground. for the 2nd Filter Stage. Its value programs the common
V
mode voltage of the differential output of the fi lter. Pin 2 is a
MID (Pin 7):
The VMID pin is internally biased at mid- supply, see block diagram. For single supply operation high impedance input, which can be driven from an external the V voltage reference, or Pin 2 can be tied to Pin 7 on the PC MID pin should be bypassed with a quality 0.01μF ceramic capacitor to Pin 6. For dual supply operation, board. Pin 2 should be bypassed with a 0.01μF ceramic Pin 7 can be bypassed or connected to a high quality DC capacitor unless it is connected to a ground plane. ground. A ground plane should be used. A poor ground
V+ and V – (Pins 3, 6):
Power Supply Pins
.
For a single will increase noise and distortion. Pin 7 sets the output 3.3V or 5V supply (Pin 6 grounded) a quality 0.1μF ceramic common mode voltage of the 1st stage of the fi lter. It has bypass capacitor is required from the positive supply pin a 5.5kΩ impedance, and it can be overridden with an (Pin 3) to the negative supply pin (Pin 6). The bypass external low impedance voltage source. should be as close as possible to the IC. For dual supply
BLOCK DIAGRAM
RIN V + IN IN+ OUT– V– VMID 8 7 6 5 V+ 11k PROPRIETARY LOWPASS 806Ω FILTER STAGE 11k 400Ω V– OP AMP 400Ω + – + – V V OCM OCM – + – + 400Ω 400Ω 806Ω 1 2 3 4 66005 BD V – IN V IN– OCM V+ OUT+ RIN 66005fb 6