Datasheet AD8352 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | 2 GHz Ultralow Distortion Differential RF/IF Amplifier |
| Seiten / Seite | 19 / 7 — Data Sheet. AD8352. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. RDP 1. … |
| Revision | C |
| Dateiformat / Größe | PDF / 464 Kb |
| Dokumentensprache | Englisch |
Data Sheet. AD8352. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. RDP 1. 12 GND. RGP 2. 11 VOP. RGN 3. TOP VIEW. 10 VON. (Not to Scale). RDN 4
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Data Sheet AD8352 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS P NB CM CC VI E V V 16 15 14 13 RDP 1 12 GND RGP 2 AD8352 11 VOP RGN 3 TOP VIEW 10 VON (Not to Scale) RDN 4 9 GND 5 6 7 8 N VI ND ND CC G G V NOTES 1. THE EXPOSED PAD MUST BE CONNECTED TO GROUND VIA A
003
LOW IMPEDANCE PATH, BOTH THERMALLY AND ELECTRICALLY.
05728- Figure 3. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 RDP Positive Distortion Adjust. 2 RGP Positive Gain Adjust. 3 RGN Negative Gain Adjust. 4 RDN Negative Distortion Adjust. 5 VIN Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. 6, 7, 9, 12 GND Ground. Connect this pin to low impedance GND. 8, 13 VCC Positive Supply. 10 VON Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 11 VOP Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 14 VCM Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the input and output. Typically decoupled to ground with a 0.1 µF capacitor. With no reference applied, input and output common mode floats to midsupply (VCC/2). 15 ENB Enable. Apply positive voltage (1.3 V < ENB < VCC) to activate device. 16 VIP Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. EPAD Exposed Pad. The exposed pad must be connected to ground via a low impedance path, both thermally and electrically. Rev. C | Page 7 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS NOISE DISTORTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION GAIN AND DISTORTION ADJUSTMENT (DIFFERENTIAL INPUT) SINGLE-ENDED INPUT OPERATION NARROW-BAND, THIRD-ORDER INTERMODULATION CANCELLATION HIGH PERFORMANCE ADC DRIVING LAYOUT AND TRANSMISSION LINE EFFECTS EVALUATION BOARD EVALUATION BOARD LOADING SCHEMES SOLDERING INFORMATION EVALUATION BOARD SCHEMATICS OUTLINE DIMENSIONS ORDERING GUIDE
003
LOW IMPEDANCE PATH, BOTH THERMALLY AND ELECTRICALLY.
05728- Figure 3. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 RDP Positive Distortion Adjust. 2 RGP Positive Gain Adjust. 3 RGN Negative Gain Adjust. 4 RDN Negative Distortion Adjust. 5 VIN Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. 6, 7, 9, 12 GND Ground. Connect this pin to low impedance GND. 8, 13 VCC Positive Supply. 10 VON Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 11 VOP Balanced Differential Output. This pin is biased to VCM, typically ac-coupled. 14 VCM Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the input and output. Typically decoupled to ground with a 0.1 µF capacitor. With no reference applied, input and output common mode floats to midsupply (VCC/2). 15 ENB Enable. Apply positive voltage (1.3 V < ENB < VCC) to activate device. 16 VIP Balanced Differential Input. This pin is biased to VCM, typically ac-coupled. EPAD Exposed Pad. The exposed pad must be connected to ground via a low impedance path, both thermally and electrically. Rev. C | Page 7 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS NOISE DISTORTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION GAIN AND DISTORTION ADJUSTMENT (DIFFERENTIAL INPUT) SINGLE-ENDED INPUT OPERATION NARROW-BAND, THIRD-ORDER INTERMODULATION CANCELLATION HIGH PERFORMANCE ADC DRIVING LAYOUT AND TRANSMISSION LINE EFFECTS EVALUATION BOARD EVALUATION BOARD LOADING SCHEMES SOLDERING INFORMATION EVALUATION BOARD SCHEMATICS OUTLINE DIMENSIONS ORDERING GUIDE