Datasheet LTC6403-1 (Analog Devices) - 9

LTC6403-1
PIN FUNCTIONS SHDN (Pin 1):
When SHDN is floating or directly tied to V+, driving the input impedance presented by the VOCM pin. the LTC6403-1 is in the normal (active) operating mode. On the LTC6403-1, the VOCM pin has an input resistance When Pin 1 is pulled a minimum of 2.1V below V+, the of approximately 23k to a mid-supply potential. The VOCM LTC6403-1 enters into a low power shutdown state. See pin should be bypassed with a high quality ceramic bypass Applications Information for more details. capacitor of at least 0.01µF, (unless you are using split
V+, V– (Pins 2, 10, 11 and Pins 3, 9, 12):
Power Supply supplies, then connect directly to a low impedance, low Pins. Three pairs of power supply pins are provided to keep noise ground plane) to minimize common mode noise the power supply inductance as low as possible to prevent from being converted to differential noise by impedance any degradation of amplifier 2nd harmonic performance. It mismatches both external and internal to the IC. is critical that close attention be paid to supply bypassing.
NC (Pins 5, 16):
No Connection. These pins are not con- For single supply applications (Pins 3, 9 and 12 grounded) nected internally. it is recommended that high quality 0.1µF surface mount
+OUT, –OUT (Pins 7, 14):
Unfiltered Output Pins. Each ceramic bypass capacitors be placed between Pins 2 and amplifier output is designed to drive a load capacitance of 3, between Pins 11 and 12, and between Pins 10 and 9 10pF. This means the amplifier can drive 10pF from each with direct short connections. Pins 3, 9 and 10 should be output to ground or 5pF differentially. Larger capacitive tied directly to a low impedance ground plane with minimal loads should be decoupled with at least 25Ω resistors routing. For dual (split) power supplies, it is recommended from each output. that at least two additional high quality, 0.1µF ceramic capacitors are used to bypass pin V+ to ground and V– to
+OUTF, –OUTF (Pins 8, 13):
Filtered Output Pins. These ground, again with minimal routing. For driving large loads pins have a series 100Ω resistor connected between the (<200Ω), additional bypass capacitance may be needed for filtered and unfiltered outputs and three 12pF capacitors. optimal performance. Keep in mind that small geometry Both +OUTF, and –OUTF have 12pF to V–, plus an additional (e.g. 0603) surface mount ceramic capacitors have a much 12pF differentially between +OUTF and –OUTF. This filter higher self resonant frequency than do leaded capacitors, creates a differential lowpass pole with a –3dB bandwidth and perform best in high speed applications. of 44.2MHz.
VOCM (Pin 4):
Output Common Mode Reference Voltage.
+IN, –IN (Pins 15, 6):
Noninverting and Inverting Input The voltage on VOCM sets the output common mode voltage pins of the amplifier, respectively. For best performance, level (which is defined as the average of the voltages on it is highly recommended that stray capacitance be kept the +OUT and –OUT pins). The VOCM pin is the midpoint to an absolute minimum by keeping printed circuit con- of an internal resistive voltage divider between V+ and nections as short as possible and stripping back nearby V– that develops a (default) mid-supply voltage potential surrounding ground plane away from these pins. to maximize output signal swing. The VOCM pin can be
Exposed Pad (Pin 17):
Tie the pad to V– (Pins 3, 9, and overdriven by an external voltage reference capable of 12). If split supplies are used, do not tie the pad to ground. 64031fb For more information www.linear.com/LTC6403-1 9