Datasheet LTC6421-20 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungDual Matched 1.3GHz Differential Amplifiers/ADC Drivers
Seiten / Seite16 / 9 — APPLICATIONS INFORMATION. Output Impedance Match. Output Common Mode …
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APPLICATIONS INFORMATION. Output Impedance Match. Output Common Mode Adjustment

APPLICATIONS INFORMATION Output Impedance Match Output Common Mode Adjustment

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LTC6421-20
APPLICATIONS INFORMATION
Referring to Figure 3, LTC6421-20 can be easily confi gured
Output Impedance Match
for single-ended input and differential output without a The LTC6421-20 can drive an ADC directly without external balun. The signal is fed to one of the inputs through a output impedance matching. Alternatively, the differential matching network while the other input is connected to the output impedance of 25Ω can be matched to a higher same matching network and a source resistor. Because the value impedance, e.g. 50Ω, by series resistors or an LC return ratios of the two feedback paths are equal, the two network. outputs have the same gain and thus symmetrical swing. In general, the single-ended input impedance and termination
Output Common Mode Adjustment
resistor RT are determined by the combination of RS, RG and R The output common mode voltage is set by the V F. For example, when RS is 50Ω, it is found that the OCM pin, single-ended input impedance is 202Ω and R which is a high impedance input. The output common T is 66.5Ω in order to match to a 50Ω source impedance. mode voltage is capable of tracking VOCM in a range from 1V to 1.6V. The bandwidth of V The LTC6421-20 is unconditionally stable. However, OCM control is typically 15MHz, which is dominated by a low pass fi lter connected the overall differential gain is affected by both source to the V impedance and load impedance as follows: OCM pin and is aimed to reduce common mode noise generation at the outputs. The internal common V 2000 R mode feedback loop has a – 3dB bandwidth of 300MHz, A OUT • L V = = V R 25 + R allowing fast rejection of any common mode output voltage IN S + 200 L disturbance. The VOCM pin should be tied to a DC bias LTC6421-20 RS 0.1μF 50Ω 100Ω 1000Ω +IN VIN + – RT IN+ OUT – 66.5Ω IN– OUT+ RS//RT 0.1μF 28.7Ω 100Ω 1000Ω –IN 642120 F03
Figure 3. Input Termination for Single-Ended 50
Ω
Input Impedance
642120fb 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION SELECTOR GUIDE DC ELECTRICAL CHARACTERISTICS AC ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS