Datasheet AD8366 (Analog Devices) - 2

HerstellerAnalog Devices
BeschreibungDC to 600 MHz, Dual-Digital Variable Gain Amplifiers
Seiten / Seite28 / 2 — AD8366. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 8/2017—Rev. A to …
RevisionB
Dateiformat / GrößePDF / 893 Kb
DokumentenspracheEnglisch

AD8366. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 8/2017—Rev. A to Rev. B. 3/2011—Rev. 0 to Rev. A

AD8366 Data Sheet TABLE OF CONTENTS REVISION HISTORY 8/2017—Rev A to Rev B 3/2011—Rev 0 to Rev A

Modelllinie für dieses Datenblatt

Textversion des Dokuments

link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 5 link to page 6 link to page 6 link to page 7 link to page 8 link to page 15 link to page 15 link to page 15 link to page 15 link to page 15 link to page 16 link to page 17 link to page 17 link to page 18 link to page 18 link to page 19 link to page 21 link to page 22 link to page 25 link to page 28 link to page 28
AD8366 Data Sheet TABLE OF CONTENTS
Features .. 1  Output Differential Offset Correction .. 15  Applications ... 1  Output Common-Mode Control ... 15  Functional Block Diagram .. 1  Gain Control Interface ... 16  General Description ... 1  Applications Information .. 17  Revision History ... 2  Basic Connections .. 17  Specifications ... 3  Direct Conversion Receiver Design ... 18  Parallel and Serial Interface timing .. 5  Quadrature Errors and Image Rejection ... 18  Absolute Maximum Ratings .. 6  Low Frequency IMD3 Performance .. 19  ESD Caution .. 6  Baseband Interface ... 21  Pin Configuration and Function Descriptions ... 7  Characterization Setups ... 22  Typical Performance Characteristics ... 8  Evaluation Board .. 25  Circuit Description ... 15  Outline Dimensions ... 28  Inputs ... 15  Ordering Guide .. 28  Outputs .. 15 
REVISION HISTORY 8/2017—Rev. A to Rev. B
Change to Figure 4 ... 7 Updated Outline Dimensions ... 28 Changes to Ordering Guide .. 28
3/2011—Rev. 0 to Rev. A
Changes to Table 2, Internal Power Dissipation Value .. 6
10/2010—Revision 0: Initial Version
Rev. B | Page 2 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS PARALLEL AND SERIAL INTERFACE TIMING ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION INPUTS OUTPUTS OUTPUT DIFFERENTIAL OFFSET CORRECTION OUTPUT COMMON-MODE CONTROL GAIN CONTROL INTERFACE APPLICATIONS INFORMATION BASIC CONNECTIONS DIRECT CONVERSION RECEIVER DESIGN QUADRATURE ERRORS AND IMAGE REJECTION LOW FREQUENCY IMD3 PERFORMANCE BASEBAND INTERFACE CHARACTERIZATION SETUPS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE