LTC6430-15 TesT circuiT a Differential Application Test Circuit A (Balanced Amp) C7 C1 60pF 1000pF R1 L1 350Ω 560nH C3 +IN 1000pF PORT GND V CC DNC DNC DNC T1 INPUT DNC +OUT T2 1:2 2:1 DNC GND RFIN DNC T_DIODE • • 50Ω, SMA PORT LTC6430-15 DNC DNC OUTPUT C4 BALUN_A DNC GND 1000pF BALUN_A C8 RF DNC OUT –OUT 60pF 50Ω, SMA C2 1000pF –IN GND V CC DNC DNC DNC L2 R2 560nH 350Ω C5 C6 1nF 0.1µF VCC = 5V 643015 F01 BALUN_A = ADT2-IT FOR 50MHz TO 300MHz BALUN_A = ADT2-1P FOR 300MHz TO 400MHz BALUN_A = ADTL2-18 FOR 400MHz TO 1000MHz ALL ARE MINI-CIRCUITS CD542 FOOTPRINT Figure 1. Test Circuit AoperaTion The LTC6430-15 is a highly linear, fixed-gain amplifier The LTC6430-15 uses a classic RF gain block topology, for differential signals. It can be considered a pair of 50Ω with enhancements to achieve excellent linearity. Shunt single-ended devices operating 180 degrees apart. Its core and series feedback elements are added to lower the input/ signal path consists of a single amplifier stage minimiz- output impedance and match them simultaneously to the ing stability issues. The input is a Darlington pair for high source and load. An internal bias controller optimizes the input impedance and high current gain. Additional circuit bias point for peak linearity over environmental changes. enhancements increase the output impedance commen- This circuit architecture provides low noise, good RF power surate with the input impedance and minimize the effects handling capability and wide bandwidth; characteristics of internal Miller capacitance. that are desirable for IF signal-chain applications. 643015f 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuit A Operation Applications Information Differential S Parameters Typical Applications Package Description Typical Application Related Parts