Datasheet LT3689, LT3689-5 (Analog Devices) - 9

LT3689/LT3689-5
PIN FUNCTIONS BST:
The BST pin is used to provide drive voltage higher
RST:
Active low, open collector logic output with a weak than the input voltage to the internal NPN power switch. pull-up to VOUT. After VOUT rises above 90% of its pro-
V
grammed value, the reset remains asserted for the period
IN:
The VIN pin supplies current to the LT3689’s internal circuitry and to the internal power switch and must be set by the capacitor on the CPOR pin. locally bypassed.
WDO:
Active low, open collector logic output with weak
SW:
The SW pin is the output of the internal power switch. pull-up to VOUT. WDO pulls low if the WDE is enabled Connect this pin to the inductor, catch diode and boost and the microprocessor fails to drive the WDI pin of the capacitor. LT3689 with an appropriate signal.
DA:
Tie the DA pin to the anode of the external catch
CWDT:
Watchdog Timer Programming Pin. Place a capa- Schottky diode. If the DA pin current exceeds 1.2A, citor (CWDT) between this pin and ground to adjust the which could occur in an overload or short-circuit condi- watchdog upper and lower boundary period. To determine tion, switching is disabled until the DA pin current falls the watchdog upper boundary period, and the lower bound- below 1.2A. ary period, use the following equations:
EN/UVLO:
The EN/UVLO pin is used to put the LT3689 in tWDU = 18.2 • CWDT (watchdog upper boundary period) shutdown mode. Pull the pin below 0.3V to shut down the tWDL = 0.588 • CWDT (watchdog lower boundary period) LT3689. The 1.26V threshold can function as an accurate t undervoltage lockout (UVLO), preventing the regulator WDU and tWDL are in ms and CWDT is in nF. As an example, a 47nF capacitor will generate an 855ms watchdog upper from operating until the input voltage has reached the boundary period and a 27.6ms watchdog lower boundary programmed level. period.
FB
: The LT3689 regulates the feedback pin to 0.800V. Con-
C
nect the feedback resistor divider tap to this pin. For the
POR:
Reset Delay Timer Programming Pin. Attach an external capacitor (C fixed LT3689-5 output, this pin can be used to connect a POR) to GND to set a reset delay time of 2.3ms/nF. phase lead capacitor between the OUT pin and FB pin to optimize transient response.
RT:
Sets the Internal Oscillator Frequency. Tie a 31.6k resistor from RT to GND for a 500kHz switching frequency.
WDE:
Watchdog Timer Enable Pin. This pin disables the watchdog timer if the WDE voltage exceeds 1V. WDO is
SYNC:
Drive the SYNC pin with a logic level signal with high in this condition. positive and negative pulse widths of at least 80ns. The RT resistor should be chosen to set the LT3689 switching
W/T:
Setting W/T low puts the LT3689 watchdog timer into frequency at least 20% below the lowest synchronization window mode. If two or more negative edges occur on input frequency. WDI before the watchdog lower boundary (tWDL) period expires, or no negative edge occurs within the watchdog
OUT:
The OUT pin supplies current to the internal circuitry upper boundary (t when OUT is above 3V, reducing input quiescent current. WDU) period, the part will set WDO low. If W/T is set high, the part will only set WDO low if no transi- The internal Schottky diode is connected from OUT to BST, tion occurs within the watchdog upper boundary period. providing the charging path for the boost capacitor. For the LT3689-5, this pin connects to the internal feedback
WDI:
Watchdog Timer Input Pin. This pin receives the divider that programs the fixed 5V output. watchdog signal from a microprocessor. If the appropriate signal is not received, the part will pulse WDO low for a
GND:
Ground. Tie the exposed pad directly to the ground plane. The exposed pad metal of the package provides both period equal to the reset timeout period. The watchdog electrical contact to ground and good thermal contact to timer is disabled until the WDO pin goes high again. the printed circuit board. The device must be soldered to the circuit board for proper operation. 3689fe For more information www.linear.com/LT3689 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts