Datasheet LTC3869, LTC3869-2 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungDual, 2-Phase Synchronous Step-Down DC/DC Controllers
Seiten / Seite44 / 9 — pin FuncTions (UF/UFD/GN). RUN1, RUN2 (Pin 26, Pin 9/Pin 27, Pin 10/Pin …
Dateiformat / GrößePDF / 687 Kb
DokumentenspracheEnglisch

pin FuncTions (UF/UFD/GN). RUN1, RUN2 (Pin 26, Pin 9/Pin 27, Pin 10/Pin 1, Pin. 13):

pin FuncTions (UF/UFD/GN) RUN1, RUN2 (Pin 26, Pin 9/Pin 27, Pin 10/Pin 1, Pin 13):

Modelllinie für dieses Datenblatt

Textversion des Dokuments

LTC3869/LTC3869-2
pin FuncTions (UF/UFD/GN) RUN1, RUN2 (Pin 26, Pin 9/Pin 27, Pin 10/Pin 1, Pin
nels in continuous mode of operation. Connect to INTVCC
13):
Run Control Inputs. A voltage above 1.2V on either to enable pulse-skipping mode of operation. Leave the pin turns on the IC. However, forcing either of these pins pin floating will enable Burst Mode operation. A clock on below 1.2V causes the IC to shut down the circuitry required the pin will force the controller into continuous mode of for that particular channel. There are 1µA pull-up currents operation and synchronize the internal oscillator with the for these pins. Once the RUN pin raises above 1.2V, an clock on this pin. The PLL compensation components are additional 4.5µA pull-up current is added to the pin. integrated inside the IC.
VFB1, VFB2 (Pin 3, Pin 4/Pin 4, Pin 5/Pin 4, Pin 10):
Error
FREQ (Pin 25/Pin 26/Pin 28):
There is a precision 10µA Amplifier Feedback Inputs. These pins receive the remotely current flowing out of this pin. Connect a resistor to ground sensed feedback voltages for each channel from external set the controllers’ operating frequency. Alternatively, this resistive dividers across the outputs. pin can be driven with a DC voltage to vary the frequency
I
of the internal oscillator.
TH1, ITH2 (Pin 2, Pin 5/Pin 3, Pin 6/Pin 6, Pin 8):
Current Control Thresholds and Error Amplifier Compensation
ILIM (Pin 10/Pin 11/NA):
Current Comparator Sense Points. Each associated channels’ current comparator Voltage Range Inputs. This pin is to be programmed to tripping threshold increases with its ITH control voltage. SGND, FLOAT or INTVCC to set the maximum current
SGND (Pin 29/Pin 29/Pin 7):
Signal Ground. All small- sense threshold to three different levels for each compara- signal components and compensation components should tor. The current limit default value is set to be 50mV for connect to this ground, which in turn connects to PGND LTC3869GN-2. at one point. Pin 29 is the exposed pad, only available for
EXTVCC (Pin 11/Pin 12/Pin 14):
External Power Input the UF/UFD package. The exposed pad must be soldered to an Internal Switch Connected to INTVCC. This switch to PCB ground for electrical connection and rated thermal closes and supplies the IC power, bypassing the internal performance. low dropout regulator, whenever EXTVCC is higher than
TK/SS1, TK/SS2 (Pin 1, Pin 6/Pin 2, Pin 7/Pin 5, Pin
4.7V. Do not exceed 6V on this pin.
9):
Output Voltage Tracking and Soft-Start Inputs. When
VIN (Pin 19/Pin 20/Pin 22):
Main Input Supply. Decouple one particular channel is configured to be the master of this pin to PGND with a capacitor (0.1µF to 1µF). two channels, a capacitor to ground at this pin sets the
BOOST1, BOOST2 (Pin 21, Pin 15/Pin 22, Pin 16/Pin
ramp rate for the master channel’s output voltage. When
24, Pin 18):
Boosted Floating Driver Supplies. The (+) the channel is configured to be the slave of two channels, terminal of the booststrap capacitors connect to these the VFB voltage of the master channel is reproduced by a pins. These pins swing from a diode voltage drop below resistor divider and applied to this pin. Internal soft-start INTV currents of 1.2µA are charging these pins. CC up to VIN + INTVCC.
TG1, TG2 (Pin 22, Pin 14/Pin 23, Pin 15/Pin 25, Pin 17): MODE/PLLIN (Pin 24/Pin 25/Pin 27):
Forced Continuous Top Gate Driver Outputs. These are the outputs of floating Mode, Burst Mode Operation, or Pulse-Skipping Mode drivers with a voltage swing equal to INTV Selection Pin and External Synchronization Input to Phase CC superimposed on the switch nodes voltages. Detector Pin. Connect this pin to SGND to force both chan- 38692fb For more information www.linear.com/LTC3869 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts