Datasheet LT3975 (Analog Devices) - 10

LT3975
OPERATION
The LT3975 is a constant frequency, current mode step- Between bursts, all circuitry associated with controlling down regulator. An oscillator, with frequency set by RT, the output switch is shut down reducing the input supply sets an RS flip-flop, turning on the internal power switch. current to 1.7μA. In a typical application, 2.7μA will be An amplifier and comparator monitor the current flowing consumed from the supply when regulating with no load. between the VIN and SW pins, turning the switch off when The oscillator reduces the LT3975’s operating frequency this current reaches a level determined by the voltage at when the voltage at the FB pin is low. This frequency VC (see Block Diagram). An error amplifier measures the foldback helps to control the output current during start- output voltage through an external resistor divider tied up and overload. to the FB pin and servos the VC node. If the error ampli- fier’s output increases, more current is delivered to the The LT3975 can provide up to 2.5A of output current. output; if it decreases, less current is delivered. An active A current limit foldback feature throttles back the cur- clamp on the VC pin provides current limit. The VC pin is rent limit during overload conditions to limit the power also clamped by the voltage on the SS pin; soft-start is dissipation. When SS is below 2V, the LT3975 overrides implemented by generating a voltage ramp at the SS pin the current limit foldback circuit to avoid interfering with using an external capacitor. start-up. Thermal shutdown further protects the part from excessive power dissipation, especially in elevated ambient An internal regulator provides power to the control circuitry. temperature environments. The bias regulator normally draws power from the VIN pin, but if the OUT pin is connected to an external volt- If the input voltage decreases towards the programmed age higher than 3.2V, bias power will be drawn from the output voltage, the LT3975 will start to skip switch-off external source (typically the regulated output voltage). times and decrease the switching frequency to maintain This improves efficiency. output regulation. As the input voltage decreases below the programmed output voltage, the output voltage will be If the EN pin is low, the LT3975 is shut down and draws regulated 500mV below the input voltage. This enforced 700nA from the input. When the EN pin falls below 1.02V, minimum dropout voltage limits the duty cycle and keeps the switching regulator will shut down, and when the EN the boost capacitor charged during dropout conditions. pin rises above 1.08V, the switching regulator will become Since sufficient boost voltage is maintained, the internal active. This accurate threshold allows programmable switch can fully saturate yielding low dropout performance. undervoltage lockout. The LT3975 contains a power good comparator which The switch driver operates from either VIN or from the trips when the FB pin is at 91.6% of its regulated value. BOOST pin. An external capacitor is used to generate a The PG output is an open-drain transistor that is off when voltage at the BOOST pin that is higher than the input the output is in regulation, allowing an external resistor supply. This allows the driver to fully saturate the internal to pull the PG pin high. Power good is valid when V bipolar NPN power switch for efficient operation. IN is above 2V. When the LT3975 is shut down the PG pin is To further optimize efficiency, the LT3975 automatically actively pulled low. switches to Burst Mode operation in light load situations. 3975f 10 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS