Datasheet LT8611 (Analog Devices) - 9

LT8611
PIN FUNCTIONS SYNC (Pin 1):
External Clock Synchronization Input.
NC (Pins 9, 10, 11, 12):
No Connect. These pins are not Ground this pin for low ripple Burst Mode operation at low connected to internal circuitry. It is recommended that output loads. Tie to a clock source for synchronization to these be connected to GND so that the exposed pad GND an external frequency. Apply a DC voltage of 3V or higher can be run to the top level GND copper to enhance thermal or tie to INTVCC for pulse-skipping mode. When in pulse- performance. skipping mode, the IQ will increase to several hundred
SW (Pins 13, 14, 15):
The SW pins are the outputs of the µA. When SYNC is DC high or synchronized, frequency internal power switches. Tie these pins together and con- foldback will be disabled. Do not float this pin. nect them to the inductor and boost capacitor. This node
TR/SS (Pin 2):
Output Tracking and Soft-Start Pin. This should be kept small on the PCB for good performance. pin allows user control of output voltage ramp rate during
BST (Pin 16):
This pin is used to provide a drive voltage, start-up. A TR/SS voltage below 0.97V forces the LT8611 higher than the input voltage, to the topside power switch. to regulate the FB pin to equal the TR/SS pin voltage. When Place a 0.1µF boost capacitor as close as possible to the IC. TR/SS is above 0.97V, the tracking function is disabled and the internal reference resumes control of the error
INTVCC (Pin 17):
Internal 3.4V Regulator Bypass Pin. amplifier. An internal 2.2μA pull-up current from INTVCC on The internal power drivers and control circuits are pow- this pin allows a capacitor to program output voltage slew ered from this voltage. INTVCC maximum output cur- rate. This pin is pulled to ground with an internal 230Ω rent is 20mA. Do not load the INTVCC pin with external MOSFET during shutdown and fault conditions; use a series circuitry. INTVCC current will be supplied from BIAS if resistor if driving from a low impedance output. This pin VBIAS > 3.1V, otherwise current will be drawn from VIN. may be left floating if the tracking function is not needed. Voltage on INTVCC will vary between 2.8V and 3.4V when V
RT (Pin 3):
A resistor is tied between RT and ground to BIAS is between 3.0V and 3.6V. Decouple this pin to power ground with at least a 1μF low ESR ceramic capacitor set the switching frequency. placed close to the IC.
EN/UV (Pin 4):
The LT8611 is shut down when this pin
BIAS (Pin 18):
The internal regulator will draw current from is low and active when this pin is high. The hysteretic BIAS instead of V threshold voltage is 1.00V going up and 0.96V going IN when BIAS is tied to a voltage higher than 3.1V. For output voltages of 3.3V and above this pin down. Tie to VIN if the shutdown feature is not used. An should be tied to V external resistor divider from V OUT. If this pin is tied to a supply other IN can be used to program than V a V OUT use a 1µF local bypass capacitor on this pin. IN threshold below which the LT8611 will shut down.
PG (Pin 19):
The PG pin is the open-drain output of an
VIN (Pins 5, 6):
The VIN pins supply current to the LT8611 internal comparator. PG remains low until the FB pin is internal circuitry and to the internal topside power switch. within ±9% of the final regulation voltage, and there are These pins must be tied together and be locally bypassed. no fault conditions. PG is valid when V Be sure to place the positive terminal of the input capaci- IN is above 3.4V, regardless of EN/UV pin state. tor as close as possible to the VIN pins, and the negative capacitor terminal as close as possible to the PGND pins.
FB (Pin 20):
The LT8611 regulates the FB pin to 0.970V. Connect the feedback resistor divider tap to this pin. Also,
PGND (Pins 7, 8):
Power Switch Ground. These pins are connect a phase lead capacitor between FB and V the return path of the internal bottom-side power switch OUT. Typically, this capacitor is 4.7pF to 10pF. and must be tied together. Place the negative terminal of the input capacitor as close to the PGND pins as possible.
ISP (Pin 21):
Current Sense (+) Pin. This is the noninvert- ing input to the current sense amplifier. 8611fa For more information www.linear.com/LT8611 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts