Datasheet LTC3870 (Analog Devices) - 6

LTC3870
pin FuncTions MODE0/MODE1 (Pin 1/Pin 8):
DCM/CCM Mode Control
PHASMD (Pin 12):
Phase Set Pin. This pin can be tied to Pins. Channel0/Channel1 operates in forced continuous SGND, INTVCC or a resistor divider from INTVCC to SGND. mode if MODE0/MODE1 pin is logic high. There is a 500kΩ This pin determines the relative phases between the ext- pull down resistor on MODE0/MODE1 internally. The ernal clock on the SYNC pin and the internal controllers. default operation mode in each channel is discontinuous See Table 1 in the Operation Section for details. mode operation unless these pins are actively driven high.
TG0/TG1 (Pin 24/Pin 13):
Top Gate Driver Outputs. These
I + + SENSE0 /ISENSE1 (Pin 2/Pin 7):
Current Sense Comparator are the outputs of floating drivers with a voltage swing positive inputs, normally connected to the positive node equal to INTVCC superimposed on the switch node voltages. of the DCR sensing networks or current sensing resistors.
SW0/SW1 (Pin 23/Pin 14):
Switch Node Connections to
I − − SENSE0 /ISENSE1 (Pin 3/Pin 6):
Current Sense Comparator Inductors. Voltage swings at the pins are from a Schottky negative inputs, normally connected to the negative node diode (external) voltage drop below ground to VIN. of the DCR sensing network or current sensing resistors.
BOOST0/BOOST1 (Pin 22/Pin 15):
Boosted Floating Driver
RUN0/RUN1 (Pin 4/Pin 5):
Enable RUN Input Pins. Logic Supplies. The (+) terminal of the bootstrap capacitors con- high on these pins enables the corresponding channel. In nect to these pins. These pins swing from a diode voltage multiphase operation, these pins are connected to master drop below INTVCC up to VIN + INTVCC. RUN pins.
BG0/BG1 (Pin 21/Pin 16):
Bottom Gate Driver Outputs.
ITH0/ITH1 (Pin 28/Pin 9):
Current Control Threshold. Each These pins drive the gates of the bottom N-Channel MOS- associated channel’s current comparator tripping threshold FETs between PGND and INTVCC. increases with its ITH voltage. In multiphase operation,
INTV
these pins are connected to the master controller’s I
CC (Pin 17):
Internal Regulator 5V Output. The TH internal control circuits are powered from this voltage. pins for current sharing. Bypass this pin to PGND with a minimum of 4.7µF low
ILIM (Pin 10):
Program Current Comparators’ Sense ESR tantalum or ceramic capacitor. INTVCC is enabled as Voltage Range. This pin can be tied to SGND or INTVCC soon as VIN is powered. to select the maximum current sense threshold for each
EXTV
current comparator. SGND sets both channels’ current low
CC (Pin 18):
External power input to an internal LDO connected to INTV range with maximum 50mV sensing voltage. INTV CC. This LDO supplies INTVCC power CC sets bypassing the internal LDO powered from V both channels’ current high range with maximum 75mV IN whenever EXTV sensing voltage. For equal current sharing, the setup on CC is higher than 4.8V. See EXTVCC connection in the Applications Information Section. Do not exceed 14V on the ILIM pin has to be same as the setup on the bit 7 of this pin. Bypass this pin to PGND with a minimum of 4.7µF MFR_PWM_MODE_3880/3883/3886/3887 register in the low ESR tantalum or ceramic capacitor. If the EXTV master controller. See Table 2 in the Operation Section CC pin is not used, leave it open or tie it to ground. EXTV for details. CC can be present before VIN. However, EXTVCC is enabled only
SYNC (Pin 11):
External Clock Synchronization Input. If an if VIN is higher than 6.5V. external clock is present at this pin, the switching frequency
PGND (Pin 19):
Power Ground Pin. Connect this pin closely will be synchronized to the falling edge of the external to the sources of the bottom N-Channel MOSFETs and the clock. In multiphase operation, this pin is connected to (–) terminals of C the master's SYNC pin for frequency synchronization. Do IN. not float the SYNC pin.
VIN (Pin 20):
Main Input Supply. Bypass this pin to PGND with a capacitor (0.1µF to 1µF). 3870fb 6 For more information www.linear.com/LTC3870