Datasheet LT8613 (Analog Devices) - 9

LT8613
pin FuncTions SYNC (Pin 1):
External Clock Synchronization Input.
GND (Pins 11, 12, 13, 14):
It is recommended that these Ground this pin for low ripple Burst Mode operation at low be connected to GND so that the exposed pad GND can output loads. Tie to a clock source for synchronization to be run to the top level GND copper to enhance thermal an external frequency. Apply a DC voltage of 3V or higher performance. or tie to INTVCC for pulse-skipping mode. When in pulse-
SW (Pins 15–19):
The SW pins are the outputs of the skipping mode, the IQ will increase to several hundred internal power switches. Tie these pins together and con- µA. When SYNC is DC high or synchronized, frequency nect them to the inductor and boost capacitor. This node foldback will be disabled. Do not float this pin. should be kept small on the PCB for good performance.
TR/SS (Pin 2):
Output Tracking and Soft-Start Pin. This
BST (Pin 20):
This pin is used to provide a drive voltage, pin allows user control of output voltage ramp rate during higher than the input voltage, to the topside power switch. start-up. A TR/SS voltage below 0.97V forces the LT8613 Place a 0.1µF boost capacitor as close as possible to the IC. to regulate the FB pin to equal the TR/SS pin voltage. When TR/SS is above 0.97V, the tracking function is disabled
INTVCC (Pin 21):
Internal 3.4V Regulator Bypass Pin. and the internal reference resumes control of the error The internal power drivers and control circuits are pow- amplifier. An internal 2.2μA pull-up current from INTVCC ered from this voltage. INTVCC maximum output cur- on this pin allows a capacitor to program output voltage rent is 20mA. Do not load the INTVCC pin with external slew rate. This pin is pulled to ground with an internal 230Ω circuitry. INTVCC current will be supplied from BIAS if MOSFET during shutdown and fault conditions; use a series VBIAS > 3.1V, otherwise current will be drawn from VIN. resistor if driving from a low impedance output. This pin Voltage on INTVCC will vary between 2.8V and 3.4V when may be left floating if the tracking function is not needed. VBIAS is between 3.0V and 3.6V. Decouple this pin to power ground with at least a 1μF low ESR ceramic capacitor
RT (Pin 3):
A resistor is tied between RT and ground to placed close to the IC. set the switching frequency.
BIAS (Pin 22):
The internal regulator will draw current from
EN/UV (Pin 4):
The LT8613 is shut down when this pin BIAS instead of V is low and active when this pin is high. The hysteretic IN when BIAS is tied to a voltage higher than 3.1V. For output voltages of 3.3V and above this pin threshold voltage is 1.00V going up and 0.96V going should be tied to V down. Tie to V OUT. If this pin is tied to a supply other IN if the shutdown feature is not used. An than V external resistor divider from V OUT use a 1µF local bypass capacitor on this pin. IN can be used to program a VIN threshold below which the LT8613 will shut down.
PG (Pin 23):
The PG pin is the open-drain output of an internal comparator. PG remains low until the FB pin is
VIN (Pins 5, 6, 7):
The VIN pins supply current to the LT8613 within ±9% of the final regulation voltage, and there are internal circuitry and to the internal topside power switch. no fault conditions. PG is valid when V These pins must be tied together and be locally bypassed. IN is above 3.4V, regardless of EN/UV pin state. Be sure to place the positive terminal of the input capaci- tor as close as possible to the VIN pins, and the negative
FB (Pin 24):
The LT8613 regulates the FB pin to 0.970V. capacitor terminal as close as possible to the PGND pins. Connect the feedback resistor divider tap to this pin. Also, connect a phase lead capacitor between FB and V
PGND (Pins 8, 9, 10):
Power Switch Ground. These pins OUT. Typically, this capacitor is 4.7pF to 10pF. are the return path of the internal bottom-side power switch and must be tied together. Place the negative terminal of
ISP (Pin 25):
Current Sense (+) Pin. This is the noninvert- the input capacitor as close to the PGND pins as possible. ing input to the current sense amplifier. 8613f 9 For more information www.linear.com/LT8613 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts