Datasheet LTC3870-1 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | PolyPhase Step-Down Slave Controller for Digital Power System Management |
| Seiten / Seite | 20 / 10 — operaTion. 2 + 2 OPERATION. 1 + 3 OPERATION. 4 PHASE OPERATION. 6 PHASE … |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
operaTion. 2 + 2 OPERATION. 1 + 3 OPERATION. 4 PHASE OPERATION. 6 PHASE OPERATION
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC3870-1
operaTion 2 + 2 OPERATION 1 + 3 OPERATION
CH0 CH1 CH0 CH1 CH0 CH1 0° 180° 120° 240° 0° 180° LTC3887-1 LTC3870-1 LTC3887-1 PHASMD = 2/3 INTVCC OR FLOAT CH0 CH1 180° 0° LTC3870-1 PHASMD = GND
4 PHASE OPERATION 6 PHASE OPERATION
CH0 CH1 CH0 CH1 CH0 CH1 CH0 CH1 CH0 CH1 90° 270° 0° 180° 0° 180° 60° 300° 120° 240° LTC3870-1 LTC3887-1 LTC3887-1 LTC3870-1 LTC3870-1 PHASMD = INTVCC PHASMD = 1/3 INTVCC PHASMD = 2/3 INTVCC 38701 F01
Figure 1. Examples of Single/Dual Output Multiphase Converters Frequency Selection and Phase-Locked Loop (FREQ
integrated inside the LTC3870-1. The phase-locked loop
and SYNC Pins)
is capable of locking to any frequency within the range of The selection of switching frequency is a trade-off between 100kHz to 1MHz. efficiency and component size. Low frequency opera- If the SYNC pin is not being driven by an external clock tion increases efficiency by reducing MOSFET switching source, the FREQ pin can be used to program the losses, but requires larger inductance and/or capacitance LTC3870-1’s operating frequency from 100kHz to 1MHz. to maintain low output ripple voltage. The switching fre- There is a precision 10µA current flowing out of the FREQ quency of the LTC3870-1 controllers can be synchronized pin, so the user can program the controller’s switching to the falling edge of the external clock on the SYNC pin frequency with a single resistor to SGND. A curve is pro- or selected using the FREQ pin. A phase-locked loop vided later in the application section showing the relation- (PLL) is integrated in the LTC3870-1 to synchronize the ship between the voltage on the FREQ pin and switching internal oscillator to an external clock source that is con- frequency. The frequency setting resistor should always be nected to the SYNC pin; this source is normally provided present to set the controller’s initial switching frequency by the master controllers. The PLL loop filter network is before locking to the external clock. 38701f 10 For more information www.linear.com/LTC3870-1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
operaTion 2 + 2 OPERATION 1 + 3 OPERATION
CH0 CH1 CH0 CH1 CH0 CH1 0° 180° 120° 240° 0° 180° LTC3887-1 LTC3870-1 LTC3887-1 PHASMD = 2/3 INTVCC OR FLOAT CH0 CH1 180° 0° LTC3870-1 PHASMD = GND
4 PHASE OPERATION 6 PHASE OPERATION
CH0 CH1 CH0 CH1 CH0 CH1 CH0 CH1 CH0 CH1 90° 270° 0° 180° 0° 180° 60° 300° 120° 240° LTC3870-1 LTC3887-1 LTC3887-1 LTC3870-1 LTC3870-1 PHASMD = INTVCC PHASMD = 1/3 INTVCC PHASMD = 2/3 INTVCC 38701 F01
Figure 1. Examples of Single/Dual Output Multiphase Converters Frequency Selection and Phase-Locked Loop (FREQ
integrated inside the LTC3870-1. The phase-locked loop
and SYNC Pins)
is capable of locking to any frequency within the range of The selection of switching frequency is a trade-off between 100kHz to 1MHz. efficiency and component size. Low frequency opera- If the SYNC pin is not being driven by an external clock tion increases efficiency by reducing MOSFET switching source, the FREQ pin can be used to program the losses, but requires larger inductance and/or capacitance LTC3870-1’s operating frequency from 100kHz to 1MHz. to maintain low output ripple voltage. The switching fre- There is a precision 10µA current flowing out of the FREQ quency of the LTC3870-1 controllers can be synchronized pin, so the user can program the controller’s switching to the falling edge of the external clock on the SYNC pin frequency with a single resistor to SGND. A curve is pro- or selected using the FREQ pin. A phase-locked loop vided later in the application section showing the relation- (PLL) is integrated in the LTC3870-1 to synchronize the ship between the voltage on the FREQ pin and switching internal oscillator to an external clock source that is con- frequency. The frequency setting resistor should always be nected to the SYNC pin; this source is normally provided present to set the controller’s initial switching frequency by the master controllers. The PLL loop filter network is before locking to the external clock. 38701f 10 For more information www.linear.com/LTC3870-1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts