Datasheet LT1055, LT1056 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Precision, High Speed, JFET Input Operational Amplifiers |
| Seiten / Seite | 20 / 9 — TYPICAL PERFORMANCE CHARACTERISTICS. Supply Current vs Supply Voltage. … |
| Dateiformat / Größe | PDF / 329 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFORMANCE CHARACTERISTICS. Supply Current vs Supply Voltage. Output Swing vs Load Resistance
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LT1055/LT1056
TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage Output Swing vs Load Resistance Short-Circuit Current vs Time
8 15 50 TA = –55°C 12 TA = –55°C 40 TA = 25°C 9 30 6 T TA = 125°C T A = –25°C A = –55°C 6 20 LT1056 3 T 10 A = –125°C 4 25°C TA = 125°C 0 VS = ±15V 0 VS = ±15V TA = –55°C LT1055 –3 –10 SINKING T 25°C –6 A = –25°C –20 TA = 125°C SUPPLY CURRENT (mA) 2 TA = 125°C OUTPUT VOLTAGE SWING (V) –9 T T A = –125°C A = 25°C SHORT-CIRCUIT CURRENT (mA) –30 –12 TA = –55°C –40 TA = –55°C 0 –15 –50 0 5 10 15 20 0.1 0.3 1 3 10 0 1 2 3 SUPPLY VOLTAGE (V) LOAD RESISTANCE (kΩ) TIME FROM OUTPUT SHORT TO GROUND (MINUTES) LT1055/56 G25 LT1055/56 G26 LT1055/56 G27
APPLICATIONS INFORMATION
The LT1055/LT1056 may be inserted directly into LF155A/ example, leakage currents in circuitry external to the op LT355A, LF156A/LT356A, OP-15 and OP-16 sockets. amp can significantly degrade performance. High quality Offset nulling will be compatible with these devices with insulation should be used (e.g. Teflon, Kel-F); cleaning of the wiper of the potentiometer tied to the positive supply. all insulating surfaces to remove fluxes and other resi- dues will probably be required. Surface coating may be
Offset Nulling
necessary to provide a moisture barrier in high humidity V+ environments. 1 RP Board leakage can be minimized by encircling the input 2 – 5 7 circuitry with a guard ring operated at a potential close to LT1055 6 OUT LT1056 that of the inputs: in inverting configurations the guard ring 3 + 4 should be tied to ground, in noninverting connnections V – to the inverting input at pin 2. Guarding both sides of the LT1055/56 AI1 N/C No appreciable change in offset voltage drift with tem- OFFSET V+ TRIM perature will occur when the device is nulled with a potentiometer, RP, ranging from 10k to 200k. The LT1055/LT1056 can also be used in LF351, LF411, OUTPUT 8 7 1 AD547, AD611, OPA-111, and TL081 sockets, provided 6 that the nulling cicuitry is removed. Because of the LT1055/ 5 2 OFFSET LT1056’s low offset voltage, nulling will not be necessary TRIM 4 3 in most applications.
Achieving Picoampere/Microvolt Performance
INPUTS V– In order to realize the picoampere-microvolt level accuracy GUARD LT1055/56 AI2 of the LT1055/LT1056 proper care must be exercised. For 10556fd For more information www.linear.com/LT1055 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Typical Applications Simplified schematic Package Description Revision History Typical Application Related Parts
TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage Output Swing vs Load Resistance Short-Circuit Current vs Time
8 15 50 TA = –55°C 12 TA = –55°C 40 TA = 25°C 9 30 6 T TA = 125°C T A = –25°C A = –55°C 6 20 LT1056 3 T 10 A = –125°C 4 25°C TA = 125°C 0 VS = ±15V 0 VS = ±15V TA = –55°C LT1055 –3 –10 SINKING T 25°C –6 A = –25°C –20 TA = 125°C SUPPLY CURRENT (mA) 2 TA = 125°C OUTPUT VOLTAGE SWING (V) –9 T T A = –125°C A = 25°C SHORT-CIRCUIT CURRENT (mA) –30 –12 TA = –55°C –40 TA = –55°C 0 –15 –50 0 5 10 15 20 0.1 0.3 1 3 10 0 1 2 3 SUPPLY VOLTAGE (V) LOAD RESISTANCE (kΩ) TIME FROM OUTPUT SHORT TO GROUND (MINUTES) LT1055/56 G25 LT1055/56 G26 LT1055/56 G27
APPLICATIONS INFORMATION
The LT1055/LT1056 may be inserted directly into LF155A/ example, leakage currents in circuitry external to the op LT355A, LF156A/LT356A, OP-15 and OP-16 sockets. amp can significantly degrade performance. High quality Offset nulling will be compatible with these devices with insulation should be used (e.g. Teflon, Kel-F); cleaning of the wiper of the potentiometer tied to the positive supply. all insulating surfaces to remove fluxes and other resi- dues will probably be required. Surface coating may be
Offset Nulling
necessary to provide a moisture barrier in high humidity V+ environments. 1 RP Board leakage can be minimized by encircling the input 2 – 5 7 circuitry with a guard ring operated at a potential close to LT1055 6 OUT LT1056 that of the inputs: in inverting configurations the guard ring 3 + 4 should be tied to ground, in noninverting connnections V – to the inverting input at pin 2. Guarding both sides of the LT1055/56 AI1 N/C No appreciable change in offset voltage drift with tem- OFFSET V+ TRIM perature will occur when the device is nulled with a potentiometer, RP, ranging from 10k to 200k. The LT1055/LT1056 can also be used in LF351, LF411, OUTPUT 8 7 1 AD547, AD611, OPA-111, and TL081 sockets, provided 6 that the nulling cicuitry is removed. Because of the LT1055/ 5 2 OFFSET LT1056’s low offset voltage, nulling will not be necessary TRIM 4 3 in most applications.
Achieving Picoampere/Microvolt Performance
INPUTS V– In order to realize the picoampere-microvolt level accuracy GUARD LT1055/56 AI2 of the LT1055/LT1056 proper care must be exercised. For 10556fd For more information www.linear.com/LT1055 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Typical Applications Simplified schematic Package Description Revision History Typical Application Related Parts