Datasheet LTC6078, LTC6079 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | Micropower Precision, Dual/Quad CMOS Rail-to-Rail Input/Output Amplifiers |
| Seiten / Seite | 20 / 10 — APPLICATIO S I FOR ATIO. PC Board Layout. Figure 3. Vertical Orientation … |
| Dateiformat / Größe | PDF / 344 Kb |
| Dokumentensprache | Englisch |
APPLICATIO S I FOR ATIO. PC Board Layout. Figure 3. Vertical Orientation of LTC6078DD with Slots. SI PLIFIED SCHE ATIC
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Textversion des Dokuments
LTC6078/LTC6079
U U W U APPLICATIO S I FOR ATIO PC Board Layout
the fourth side. Figure 3 shows the layout of a LTC6078DD with slots at three sides. Mechanical stress on a PC board and soldering-induced stress can cause the VOS and VOS drift to shift. The DD and DHC packages are more sensitive to stress. A simple way to reduce the stress-related shifts is to mount the IC LONG DIMENSION near the short edge of the PC board, or in a corner. The board edge acts as a stress boundary, or a region where the fl exure of the board is minimum. The package should SLOTS always be mounted so that the leads absorb the stress and not the package. The package is generally aligned with the leads paralled to the long side of the PC board. The most effective technique to relieve the PC board stress is to cut slots in the board around the op amp. These slots 60789 F03 can be cut on three sides of the IC and the leads can exit on
Figure 3. Vertical Orientation of LTC6078DD with Slots W W SI PLIFIED SCHE ATIC
V+ R1 R2 M10 M11 M8 I1 – + C1 1µA I2 V+ A1 V– V M5 BIAS D4 V+ +IN D7 V+ D3 OUTPUT M1 M2 M6 M7 OUT CONTROL D6 V– D8 V+ –IN V– D2 D5 A2 BIAS SHDN – + GENERATION V– C2 D1 NOTE: SHDN IS ONLY AVAILABLE M3 M4 M9 V– IN THE DFN10 PACKAGE R3 R4 60789 SS V–
Simplifi ed Schematic of the Amplifi er
60789fa 10
U U W U APPLICATIO S I FOR ATIO PC Board Layout
the fourth side. Figure 3 shows the layout of a LTC6078DD with slots at three sides. Mechanical stress on a PC board and soldering-induced stress can cause the VOS and VOS drift to shift. The DD and DHC packages are more sensitive to stress. A simple way to reduce the stress-related shifts is to mount the IC LONG DIMENSION near the short edge of the PC board, or in a corner. The board edge acts as a stress boundary, or a region where the fl exure of the board is minimum. The package should SLOTS always be mounted so that the leads absorb the stress and not the package. The package is generally aligned with the leads paralled to the long side of the PC board. The most effective technique to relieve the PC board stress is to cut slots in the board around the op amp. These slots 60789 F03 can be cut on three sides of the IC and the leads can exit on
Figure 3. Vertical Orientation of LTC6078DD with Slots W W SI PLIFIED SCHE ATIC
V+ R1 R2 M10 M11 M8 I1 – + C1 1µA I2 V+ A1 V– V M5 BIAS D4 V+ +IN D7 V+ D3 OUTPUT M1 M2 M6 M7 OUT CONTROL D6 V– D8 V+ –IN V– D2 D5 A2 BIAS SHDN – + GENERATION V– C2 D1 NOTE: SHDN IS ONLY AVAILABLE M3 M4 M9 V– IN THE DFN10 PACKAGE R3 R4 60789 SS V–
Simplifi ed Schematic of the Amplifi er
60789fa 10