Datasheet LTC6087, LTC6088 (Analog Devices) - 9

LTC6087/LTC6088
PIN FUNCTIONS OUT:
Amplifier Output.
SHDNA:
Shutdown Pin of Amplifier A, active low and only
–IN:
Inverting Input. available with the LTC 6087DD. An internal current source pulls the pin to V+ when floating.
+IN:
Noninverting Input.
SHDNB:
Shutdown Pin of Amplifier B, active low and only
V+:
Positive Supply. available with the LTC 6087DD. An internal current source
V–:
Negative Supply. pulls the pin to V+ when floating.
NC:
Not internally connected
Exposed Pad:
Connected to V–.
APPLICATIONS INFORMATION
GN package. With fine PCB design rules, you can also
Rail-to-Rail Input
provide a guard ring around the inputs. The input stage of LTC6087/LTC6088 combines both PMOS For example, in high source impedance applications such and NMOS differential pairs, extending its input common as pH probes, photo diodes, strain gauges, et cetera, the mode voltage to both positive and negative supply voltages. low input bias current of these parts requires a clean At high input common mode range, the NMOS pair is on. board layout to minimize additional leakage current into a At low common mode range, the PMOS pair is on. The high impedance signal node. A mere 100GΩ of PC board transition happens when the common voltage is between resistance between a 5V supply trace and input trace near 1.3V and 0.9V below the positive supply. ground potential adds 50pA of leakage current. This leak- age is far greater than the bias current of the operational
Achieving Low Input Bias Current
amplifier. A guard ring around the high impedance input The DD and DHC packages are leadless and make contact traces driven by a low impedance source equal to the to the PCB beneath the package. Solder flux used during input voltage prevents such leakage problems. The guard the attachment of the part to the PCB can create leakage ring should extend as far as necessary to shield the high current paths and can degrade the input bias current per- impedance signal from any and all leakage paths. Figure formance of the part. All inputs are susceptible because 1 shows the use of a guard ring in a unity-gain configura- the backside paddle is connected to V– internally. As the tion. In this case the guard ring is connected to the output input voltage or V– changes, a leakage path can be formed and is shielding the high impedance noninverting input and alter the observed input bias current. For lowest bias from V–. Figure 2 shows the inverting gain configuration. current use the LTC6087/LTC6088 in the leaded MSOP/ OUT R LTC6087 OUT NO SOLDER MASK NO LEAKAGE LTC6087 R OVER THE GUARD RING CURRENT IN– IN– V R IN IN+ IN+ LEAKAGE CURRENT GND GUARD V– V– RING 60878 F01 60878 F02
Figure 1. Sample Layout. Unity-Gain Configuration. Using Guard Figure 2. Sample Layout. Inverting Gain Configuration. Using Ring to Shield High Impedance Input from Board Leakage Guard Ring to Shield High Impedance Input from Board Leakage
60878fd For more information www.linear.com/LTC6087 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Simplified Schematic Package Description Revision History Typical Applications Related Parts