Datasheet ADE7753 (Analog Devices) - 6

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ADE7753 TIMING CHARACTERISTICS
AVDD = DVDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.579545 MHz XTAL, TMIN to TMAX = −40°C to +85°C. Sample tested during initial release and after any redesign or process change that could affect this parameter. All input signals are specified with tr = tf = 5 ns (10% to 90%) and timed from a voltage level of 1.6 V. See Figure 3, Figure 4, and the ADE7753 Serial Interface section.
Table 2. Parameter Spec Unit Test Conditions/Comments
Write Timing t1 50 ns (min) CS falling edge to first SCLK falling edge. t2 50 ns (min) SCLK logic high pulse width. t3 50 ns (min) SCLK logic low pulse width. t4 10 ns (min) Valid data setup time before falling edge of SCLK. t5 5 ns (min) Data hold time after SCLK falling edge. t6 4 μs (min) Minimum time between the end of data byte transfers. t7 50 ns (min) Minimum time between byte transfers during a serial write. t8 100 ns (min) CS hold time after SCLK falling edge. Read Timing t 1 9 4 μs (min) Minimum time between read command (i.e., a write to communication register) and data read. t10 50 ns (min) Minimum time between data byte transfers during a multibyte read. t11 30 ns (min) Data access time after SCLK rising edge following a write to the communications register. t 2 12 100 ns (max) Bus relinquish time after falling edge of SCLK. 10 ns (min) t 3 13 100 ns (max) Bus relinquish time after rising edge of CS. 10 ns (min) 1 Minimum time between read command and data read for all registers except waveform register, which is t9 = 500 ns min. 2 Measured with the load circuit in Figure 2 and defined as the time required for the output to cross 0.8 V or 2.4 V. 3 Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit in Figure 2. The measured number is then extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time quoted in the timing characteristics is the true bus relinquish time of the part and is independent of the bus loading.
t8 CS t1 t t 6 3 t t 7 7 SCLK t t 2 4 t5 DIN 1 0 A5 A4 A3 A2 A1 A0 DB7 DB0 DB7 DB0 COMMAND BYTE MOST SIGNIFICANT BYTE LEAST SIGNIFICANT BYTE
02875-0-081 Figure 3. Serial Write Timing
CS t1 t13 t t 9 10 SCLK 0 DIN 0 A5 A4 A3 A2 A1 A0 t t t12 11 11 DOUT DB7 DB0 DB7 DB0 COMMAND BYTE MOST SIGNIFICANT BYTE LEAST SIGNIFICANT BYTE
02875-0-083 Figure 4. Serial Read Timing Rev. C | Page 6 of 60 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TERMINOLOGY PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUTS di/dt CURRENT SENSOR AND DIGITAL INTEGRATOR ZERO-CROSSING DETECTION Zero-Crossing Timeout PERIOD MEASUREMENT POWER SUPPLY MONITOR LINE VOLTAGE SAG DETECTION Sag Level Set PEAK DETECTION Peak Level Set Peak Level Record ADE7753 INTERRUPTS Using the ADE7753 Interrupts with an MCU Interrupt Timing TEMPERATURE MEASUREMENT ADE7753 ANALOG-TO-DIGITAL CONVERSION Antialias Filter ADC Transfer Function ADE7753 Reference Circuit CHANNEL 1 ADC Channel 1 Sampling Channel 1 RMS Calculation Channel 1 RMS Offset Compensation CHANNEL 2 ADC Channel 2 Sampling Channel 2 RMS Calculation Channel 2 RMS Offset Compensation PHASE COMPENSATION ACTIVE POWER CALCULATION ENERGY CALCULATION Integration Time under Steady Load POWER OFFSET CALIBRATION ENERGY-TO-FREQUENCY CONVERSION LINE CYCLE ENERGY ACCUMULATION MODE POSITIVE-ONLY ACCUMULATION MODE NO-LOAD THRESHOLD REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION APPARENT POWER CALCULATION Apparent Power Offset Calibration APPARENT ENERGY CALCULATION Integration Times under Steady Load LINE APPARENT ENERGY ACCUMULATION ENERGIES SCALING CALIBRATING AN ENERGY METER BASED ON THE ADE7753 Watt Gain Calibrating Watt Gain Using a Reference Meter Example Calibrating Watt Gain Using an Accurate Source Example Watt Offset Calibrating Watt Offset Using a Reference Meter Example Calibrating Watt Offset with an Accurate Source Example Phase Calibration Calibrating Phase Using a Reference Meter Example Calibrating Phase with an Accurate Source Example VRMS and IRMS Calibration Apparent Energy Reactive Energy CLKIN FREQUENCY SUSPENDING ADE7753 FUNCTIONALITY CHECKSUM REGISTER ADE7753 SERIAL INTERFACE ADE7753 Serial Write Operation ADE7753 Serial Read Operation ADE7753 REGISTERS ADE7753 REGISTER DESCRIPTIONS COMMUNICATIONS REGISTER MODE REGISTER (0x09) INTERRUPT STATUS REGISTER (0x0B), RESET INTERRUPT STATUS REGISTER (0x0C), INTERRUPT ENABLE REGISTER (0x0A) CH1OS REGISTER (0x0D) OUTLINE DIMENSIONS ORDERING GUIDE