Datasheet LT8490 (Analog Devices) - 9

LT8490
pin FuncTions RT (Pin 22):
Timing Resistor Pin. Adjusts the switching
EXTVCC (Pin 40):
External VCC Input. When EXTVCC ex- regulator frequency (OSC1) when SYNC is not driven by ceeds 6.4V (typical), INTVCC will be powered from this pin. a clock. Place a resistor from this pin to ground to set When EXTVCC is lower than 6.22V (typical), INTVCC will be the free-running frequency of OSC1. Do not float this pin. powered from VIN. See Switching Configuration - MODE
BG1, BG2 (Pin 23/Pin 25):
Bottom Gate Drive. Drives the Pin for additional details. gates of the bottom N-channel MOSFETs between ground
CSNOUT (Pin 41):
The (–) Input to the Output Current and GATEVCC. Sense Amplifier.
GATEVCC (Pin 24):
Power Supply for Gate Drivers. Must
CSPOUT (Pin 42):
The (+) Input to the Output Current be connected to the INTVCC pin. Do not power from any Sense Amplifier. This pin and the CSNOUT pin measure other supply. Locally bypass to ground. the voltage across the sense resistor to provide the output
BOOST1, BOOST2 (Pin 33/Pin 27):
Boosted Floating Driver current signals. Supply. The (+) terminal of the bootstrap capacitor con-
CSNIN (Pin 44):
The (–) Input to the Input Current Sense nects here. The BOOST1 pin swings from a diode voltage Amplifier. This pin and the CSPIN pin measure the voltage below GATEVcc up to VIN + GATEVCC. The BOOST2 pin across the sense resistor to provide the instantaneous swings from a diode voltage below GATEVCC up to VBAT input current signals. + GATEVCC.
CSPIN (Pin 45):
The (+) Input to the Input Current Sense
TG1, TG2 (Pin 32/Pin 28):
Top Gate Drive. Drives the top Amplifier. N-channel MOSFETs with voltage swings equal to GATEVCC
V
superimposed on the switch node voltages.
IN (Pin 46):
Main Input Supply Pin. Must be bypassed to local ground plane.
SW1, SW2 (Pin 31/Pin 29):
Switch Nodes. The (–) terminal
ECON (Pin 48):
Digital Output Pin. Optional control output of the bootstrap capacitors connect here. signal used to disconnect EXTVCC from the battery when
SRVO_FBIN (Pin 35):
Open-Drain Logic Output. This pin the average charge current drops below a predetermined is pulled to ground when the input voltage feedback loop threshold. is active. This pin is unused for most LT8490 applications
SWENO (Pin 49):
Digital Output Pin. Connect to SWEN. and can be floated. Enables the switching regulator. A 200kΩ pull-down resis-
SRVO_IIN (Pin 36):
Open-Drain Logic Output. This pin is tor is required from this pin to ground. pulled to ground when the input current feedback loop is
IOW (Pin 50):
Digital Output Pin. Connects to IMON_OUT active. This pin is unused for most LT8490 applications through a resistor. By switching the pin between logic low and can be floated. and high impedance, the total RIMON_OUT changes, which
SRVO_IOUT (Pin 37):
Open-Drain Logic Output. This pin changes the output current limit. is pulled to ground when the output current feedback loop
STATUS (Pin 51):
Digital Output Pin. When used with is active. This pin is unused for most LT8490 applications an LED, this signal provides a visual indication of the and can be floated. progress of the charging algorithm. In addition, STATUS
SRVO_FBOUT (Pin 38):
Open-Drain Logic Output. This pin transmits two UART bytes (8 bits, no parity, one stop bit, is pulled to ground when the output voltage feedback loop 2400 baud) every 3.5 seconds (typical), which indicates is active. This pin is unused for most LT8490 applications status and fault information. and can be floated.
IIR (Pin 53):
A/D Input Pin. Connects to IMON_IN to read input current. Used to manage MPPT. 8490fa For more information www.linear.com/LT8490 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts