Datasheet ADP5090 (Analog Devices) - 3

Data Sheet ADP5090 SPECIFICATIONS
VIN = 1.2 V, VSYS = VBAT = 3 V, TJ = −40°C to 125°C for minimum/maximum specifications and TA = 25°C for typical specifications, unless otherwise noted. External components and inductor (L) = 22 µH, CIN = 4.7 µF, CSYS = 4.7 µF.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
COLD-START CIRCUIT Minimum Input Voltage for Cold-Start VIN_COLD VSYS = 0 V, 0°C < TA < 85°C 380 440 mV Minimum Input Power for Cold-Start PIN_COLD 16 µW End of Cold-Start Operation Threshold VSYS_TH 1.8 1.93 2.03 V End of Cold-Start Operation Hysteresis VSYS_HYS 125 mV BOOST REGULATOR Input Voltage Operation Range VIN Cold-start completed 0.1 3.3 V Input Power Operation Range PIN Cold-start completed, VIN = 0.5 V 0.01 200 mW Input Peak Current IIN_PEAK Factory trim, 1 bit (Option 0) 100 135 mA Factory trim, 1 bit (Option 1) 195 250 mA Low-Side Switch on Resistance RLS_DS_ON 1.25 1.71 Ω High-Side Switch on Resistance RHS_DS_ON 1.38 1.88 Ω SYS Switch on Resistance RSYS_DS_ON 0.48 0.70 Ω DIS_SW High Voltage DIS_SWHIGH 1 V DIS_SW Low Voltage DIS_SWLOW 0.5 V DIS_SW Delay tDIS_DELAY 1 μs VIN CONTROL AND REGULATION VIN Open Circuit Voltage Sampling Cycle TVOC_CYCLE 19 s VIN Open Circuit Voltage Sampling Time TVOC_SAMPL 296 ms MINOP Bias Current IMINOP 1.45 2 2.55 μA MINOP Operation Voltage Range VMINOP 1 V ENERGY STORAGE MANAGEMENT Operating Quiescent Current of SYS Pin IQ_SYS VIN > VCBP ≥ VMINOP, VSYS > VBAT_SD 320 580 nA Sleeping Quiescent Current of SYS Pin IIQ_SLEEP_SYS VCBP < VMINOP, VSYS > VBAT_SD 260 480 nA Internal Reference Voltage VREF 1.14 1.21 1.28 V Battery Stop Discharging Threshold VBAT_SD 2 VBAT_TERM V Battery Stop Discharging Hysteresis Resistor RBAT_SD_HYS 65 103.5 150 kΩ Battery Terminal Charging Threshold VBAT_TERM 2.2 5.2 V Battery Terminal Charging Hysteresis VBAT_TERM_HYS 3 3.7 % PGOOD Falling Threshold at SYS Pin VSYS_PG VBAT_SD VBAT_TERM V PGOOD Hysteresis Resistor at SYS Pin RSYS_PG_HYS 65 103.5 150 kΩ PGOOD Pull-Up Resistor 11.8 17 kΩ PGOOD Pull-Down Resistor 11.8 17 kΩ Battery Switch on Resistance RBAT_SW_ON 0.55 0.73 Ω Battery Current Capability IBAT 800 mA Leakage Current at BAT Pin IBAT_LEAK VBAT = 2 V, VBAT_SD = 2.2 V, VSYS = 2 V 15 50 nA VBAT = 3.3 V, VBAT_SD = 2.2 V, VSYS = 0 V 0.5 20 nA BACK_UP POWER PATH BACK_UP Switches on Resistance RBKP_SW_ON VSYS = VBACK_UP = 3 V 1.18 1.60 Ω BACK_UP and BAT Comparator Offset VBKP_OFFSET VSYS ≥ VSYS_TH 135 185 250 mV BACK_UP and BAT Comparator Hysteresis VBAT_HYS VSYS ≥ VSYS_TH 55 75 100 mV BACK_UP Current Capability IBKP VSYS ≥ VSYS_TH 400 520 mA Plug in the backup battery first 250 µA Leakage Current at BACK_UP Pin IBKP_LEAK VBACK_UP = VSYS = VBAT = 3 V 6 18 nA THERMAL SHUTDOWN Thermal Shutdown Threshold TSHDN VSYS ≥ VSYS_TH 125 °C Thermal Shutdown Hysteresis THYS 15 °C Rev. C | Page 3 of 21 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS DETAILED FUNCTIONAL BLOCK DIAGRAM THEORY OF OPERATION COLD STARTUP (VSYS < VSYS_TH, VIN > VIN_COLD) BOOST REGULATOR (VBAT_TERM > VSYS ≥ VSYS_TH) VIN OPEN CIRCUIT AND MPPT ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH MINOP FUNCTION DISABLING BOOST BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE