Datasheet ADP5091, ADP5092 (Analog Devices) - 6
Hersteller | Analog Devices |
Beschreibung | Ultralow Power Energy Harvester PMU with MPPT and Charge Management |
Seiten / Seite | 28 / 6 — ADP5091/ADP5092. Data Sheet. REGULATED OUTPUT SPECIFICATIONS. Table 2. … |
Revision | A |
Dateiformat / Größe | PDF / 931 Kb |
Dokumentensprache | Englisch |
ADP5091/ADP5092. Data Sheet. REGULATED OUTPUT SPECIFICATIONS. Table 2. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit
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ADP5091/ADP5092 Data Sheet REGULATED OUTPUT SPECIFICATIONS
VIN = 1.2 V, VSYS = VBAT = 3 V, VREG_OUT = 2 V, L = 22 µH, CIN = 4.7 µF, CSYS = 4.7 µF, CREG_OUT = 4.7 µF, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.
Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
REGULATED OUTPUT Output Options by VID Control VREG_OUT 1.5 3.6 V Rating Current IREG_OUT VREG_OUT = 1.5 V to 3.6 V 150 mA REG_OUT Pull-Down Resistance RREG_OUT 235 Ω REG_OUT IN BOOST MODE REG_OUT Wake Threshold VREG_WAKE 1.008 × 1.027 × 1.048 × V VREG_OUT VREG_OUT VREG_OUT REG_OUT Wake Threshold VREG_WAKE_HYS 1 % Hysteresis Adjustable REG_OUT Wake VADJ_REG_WAKE 1.008 1.028 1.048 V Threshold Adjustable REG_OUT Sleep VADJ_REG_SLEEP 1.018 1.038 1.058 V Threshold High-Side Switches On Resistance RBST_DS_ON 1.63 2.15 Ω Current-Limit Threshold of Boost IREG_BST_LIM 100 155 mA Mode REG_OUT IN LOW DROPOUT (LDO) MODE REG_OUT Accuracy VREG_LDO 0 µA < IOUT < 150 mA, VSYS = (VREG_OUT + 0.5 V) −3.5 +3.5 % Adjustable REG_OUT Accuracy VREG_LDO_ADJ IOUT = 1 mA 0.999 1.015 1.028 V 0 µA < IOUT < 150 mA, VSYS = (VREG_OUT + 0.5 V) 0.985 1.015 1.045 V REG_OUT Dropout VREG_DROP IOUT = 150 mA 200 mV Current-Limit Threshold of LDO IREG_LIM VSYS ≥ VSYS_TH 200 260 mA Mode Output Noise OUTNOISE 10 Hz to 100 kHz 700 µV rms Power Supply Rejection Ratio PSRR 100 Hz 60 dB 1 kHz 40 dB REG_D0 and REG_D1 Input Logic High VREG_DX_IH 1.2 V Low VREG_DX_IL 0.4 V Input Leakage Current IREG_DX_LEAK 20 nA REG_GOOD (ADP5092 ONLY) Rising Threshold VREG_GOOD 89.5 92.5 95.7 % Hysteresis VREG_GOOD_HYS 2 % Pull-Up Resistor 11.6 17 kΩ Pull-Down Resistor 11.6 17 kΩ High Voltage VREG_GOOD_IH VREG_OUT V Rev. A | Page 6 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS REGULATED OUTPUT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FAST COLD START-UP CIRCUIT (VSYS < VSYS_TH, VIN > VIN_COLD) MAIN BOOST REGULATOR (VBAT_TERM > VSYS > VSYS_TH) VIN OPEN CIRCUIT AND MPPT MINIMUM OPERATION THRESHOLD FUNCTION DISABLING BOOST REGULATED OUTPUT WORKING MODE REG_D0 AND REG_D1 REGULATED OUTPUT CONFIGURATION REG_GOOD (ADP5092 ONLY) ENERGY STORAGE CHARGE MANAGEMENT BACKUP STORAGE PATH BACKUP AND BAT SELECTION THRESHOLD BATTERY OVERCHARGING PROTECTION BATTERY DISCHARGING PROTECTION POWER GOOD (PGOOD) POWER PATH WORKING FLOW CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ENERGY HARVESTER SELECTION ENERGY STORAGE ELEMENT SELECTION INDUCTOR SELECTION CAPACITOR SELECTION Input Capacitor SYS Capacitor REG_OUT Capacitor CBP Capacitor LAYOUT AND ASSEMBLY CONSIDERATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE