Datasheet LTC4360-1, LTC4360-2 (Analog Devices) - 6

link to page 6 LTC4360-1/LTC4360-2
OPERATION
Mobile devices like cell phones and MP3/MP4 players have completes, an internal high side switch driver slowly highly integrated subsystems fabricated from deep submi- ramps up the MOSFET gate, powering up the output at cron CMOS processes. The small form factor is accompa- a controlled rate and limiting the inrush current to the nied by low absolute maximum voltage ratings. The sensi- output capacitor. tive electronics are susceptible to damage from transient or If the voltage at the IN pin exceeds 5.8V (V DC overvoltage conditions from the power supply. IN(OV)), GATE is pulled low quickly to protect the load. The Failures or faults in the power adaptor can cause an over- incoming power supply must remain below 5.7V voltage event. So can hot-plugging an AC adaptor into the (VIN(OV) – ∆VOV) for the duration of the start-up delay to power input of the mobile device (see ADI Application restart the GATE ramp-up. Note 88). Today’s mobile devices derive their power sup- The LTC4360-1 has a CMOS compatible ON input. When ply or recharge their internal batteries from multiple alter- driven low, the part is enabled. When driven high, the native inputs like AC wall adaptors, car battery adaptors external N-channel MOSFET is turned off and the supply and USB ports. A user may unknowingly plug in the wrong current of the LTC4360-1 drops to 1.5µA. The PWRGD adaptor, damaging the device with a high or even a nega- pull-down releases during this low current sleep mode, tive power supply voltage. UVLO or overvoltage and the subsequent 130ms start-up The LTC4360 protects low voltage electronics from these delay. After the start-up delay, GATE starts its slow ramp- overvoltage conditions by controlling a low cost exter- up and ramps higher than VGATE(TH) to trigger a 65ms nal N-channel MOSFET configured as a pass transistor. delay cycle. When that completes, PWRGD pulls low. At power-up (VIN > 2.1V), a start-up delay cycle begins. The LTC4360-2 has a GATEP pin that drives an optional Any overvoltage condition causes the delay cycle to con- external P-channel MOSFET to provide protection against tinue until a safe voltage is present. When the delay cycle negative voltages at IN.
APPLICATIONS INFORMATION
The typical LTC4360 application protects 2.5V to 5.5V
Start-Up
systems in portable devices from power supply overvolt- When V age. The basic application circuit is shown in Figure 1. IN is less than the undervoltage lockout level of 2.1V, the GATE driver is held low and the PWRGD pull- Device operation and external component selection is down is high impedance. When V discussed in detail in the following sections. IN rises above 2.1V and ON (LTC4360-1) is held low, a 130ms delay cycle starts. M1 Any undervoltage or overvoltage event at IN (VIN < 2.1V or Si1470DH VOUT VIN 5V V 5V IN > 5.7V) restarts the delay cycle. This delay allows the COUT 1.5A N-channel MOSFET to isolate the output from any input 10µF GATE transients that occur at start-up. When the delay cycle IN OUT completes, GATE starts its slow ramp-up. LTC4360-1
GATE Control
ON PWRGD An internal charge pump provides a gate overdrive greater GND 436012 F01 than 3.5V when 2.5V ≤ VIN < 3V. If VIN ≥ 3V, the gate drive is guaranteed to be greater than 4.5V. This allows the use of logic-level N-channel MOSFETs. An internal 6V clamp
Figure 1. Protection from Input Overvoltage
between GATE and OUT protects the MOSFET gate. Rev B 6 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts