Datasheet LTC7860 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | High Efficiency Switching Surge Stopper |
| Seiten / Seite | 26 / 7 — pin FuncTions GATE (Pin 12):. PGND (Exposed Pad Pin 13):. FuncTional … |
| Dateiformat / Größe | PDF / 843 Kb |
| Dokumentensprache | Englisch |
pin FuncTions GATE (Pin 12):. PGND (Exposed Pad Pin 13):. FuncTional DiagraM
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Textversion des Dokuments
LTC7860
pin FuncTions GATE (Pin 12):
Gate Drive Output for External P-Channel
PGND (Exposed Pad Pin 13):
Ground Reference for Power MOSFET. The gate driver bias supply voltage (VIN-VCAP) Components (Power Ground). The PGND exposed pad must is regulated to 8V when VIN is greater than 8V. The gate be soldered to the circuit board for electrical contact and driver is disabled when (VIN-VCAP) is less than 3.5V (typi- for rated thermal performance of the package. Connect cal), 3.8V maximum in start-up and 3.25V (typical) 3.5V signal ground to power ground only at one point using a maximum in normal operation. single PCB trace.
FuncTional DiagraM
VIN UVLO VIN + CIN 3.25V – RSENSE SENSE 0.4µA RUN RUN + – 1.26V – LOGIC GATE CONTROL DRV MP HIGH CURRENT PATH Q SGND S R R VOUT IN CCAP COUT LDO OUT PLL V CAP IN – 8V SYSTEM ICMP 20µA VCO – + FREQ RFREQ + 10µA SLOPE COMPENSATION SS + GATE OFF + 0.8V CSS VIN ITPU 30µA – 0.5µA EN VGTH + EA 1.29V – RZ1 (G VFBN m = 1.8mS) – TMR FAULT + TIMER Z1 – RFB2 C LOGIC TMR V + FB VRTH 0.24V ITPDC 1.3µA COOL DOWN RFB1 ITPDR 40µA NORMAL OPERATION PGND ITH 7860 FD RITH CITH1 7860f For more information www.linear.com/LTC7860 7
pin FuncTions GATE (Pin 12):
Gate Drive Output for External P-Channel
PGND (Exposed Pad Pin 13):
Ground Reference for Power MOSFET. The gate driver bias supply voltage (VIN-VCAP) Components (Power Ground). The PGND exposed pad must is regulated to 8V when VIN is greater than 8V. The gate be soldered to the circuit board for electrical contact and driver is disabled when (VIN-VCAP) is less than 3.5V (typi- for rated thermal performance of the package. Connect cal), 3.8V maximum in start-up and 3.25V (typical) 3.5V signal ground to power ground only at one point using a maximum in normal operation. single PCB trace.
FuncTional DiagraM
VIN UVLO VIN + CIN 3.25V – RSENSE SENSE 0.4µA RUN RUN + – 1.26V – LOGIC GATE CONTROL DRV MP HIGH CURRENT PATH Q SGND S R R VOUT IN CCAP COUT LDO OUT PLL V CAP IN – 8V SYSTEM ICMP 20µA VCO – + FREQ RFREQ + 10µA SLOPE COMPENSATION SS + GATE OFF + 0.8V CSS VIN ITPU 30µA – 0.5µA EN VGTH + EA 1.29V – RZ1 (G VFBN m = 1.8mS) – TMR FAULT + TIMER Z1 – RFB2 C LOGIC TMR V + FB VRTH 0.24V ITPDC 1.3µA COOL DOWN RFB1 ITPDR 40µA NORMAL OPERATION PGND ITH 7860 FD RITH CITH1 7860f For more information www.linear.com/LTC7860 7