Datasheet LTM4633 (Analog Devices) - 8

LTM4633
pin FuncTions FREQ/PLLLPF (L8):
Frequency Set and PLL Lowpass Filter
PGOOD12, PGOOD3 (M2, M3):
Output voltage power Pin. This pin is driven with a DC voltage to set the operating good indicator for VOUT1 and VOUT2 are combined, and frequency. Generally the pin is just connected to INTVCC to VOUT3 separate. The open-drain logic output is pulled to set the typical 750kHz operating frequency. Applying a DC ground when the output voltage is not within ±7.5% of the voltage of 1.4V to this pin will set the frequency to 600kHz regulation point. and 1.6V will set it to 700kHz. When an external clock is
COMP1, COMP2, COMP3 (M4, L4, K4):
Current Control used, then the FREQ/PLLLPF pin must not be connected Threshold and Error Amplifier Compensation Point. The to any DC voltage. The pin must be floating and will have current comparator threshold increases with this control the proper internal compensation for the internal loop voltage. The LTM4633 regulator channels are all internally filter. For VOUT1,2,3 ≤ 1.5V use 600kHz, and for VOUT1,2,3 compensated for proper stability. COMP1 and COMP2 can ≥ 1.5V use ≥700kHz. These frequecny settings optimize be tied together for PolyPhase® 20A parallel operation. efficiency and eliminate minimum on-time issues for less See the Applications Information section. than 1V output. See the Applications Information section.
V MODE/PLLIN (L9):
Force Continuous Mode, Burst Mode,
FB1, VFB2, VFB3 (M5, L5, K5):
The Negative Input of the Error Amplifier for Each of the Three Channels. Internally, or Pulse-Skipping Mode Selection Pin and External Syn- each of these pins is connected to their respective output chronization Input to Phase Detector Pin. Connect this pin with a 60.4k precision resistor. Different output voltages to SGND to force all channels into the continuous mode can be programmed with an additional resistor between of operation. Connect to INTVCC to enable pulse-skipping each individual V mode of operation. Leaving the pin floating will enable Burst FB pin and ground. In PolyPhase operation, tying the V Mode operation. A clock on the pin will force the controller FB1 and VFB2 pins together allows for parallel operation up to 20A. See the Applications Information into continuous mode of operation and synchronize the section for details. internal oscillator.
TK/SS1, TK/SS2, TK/SS3 (M9, M10, M11):
Output Voltage
RUN1, RUN2, RUN3 (L10, L11, K11):
Run Control Inputs. A Tracking and Soft-Start Inputs. When one particular channel voltage above 1.3V on any RUN pin turns on that particular is configured to be the master, a capacitor to ground at channel. However, forcing any of these RUN pins below this pin sets the ramp rate for the master channel’s output 1.2V causes that channel to shut down. Each of the RUN voltage. When the channel is configured to be the slave, pins has an internal 10k resistor to ground. This resistor the V can be used with an external pull-up resistor to the input FB voltage of the master channel is reproduced by a resistor divider and applied to this pin. Internal soft-start voltage to set a UVLO for that channel, or simply to turn currents of 1.5μA are charging the soft-start capacitors. on the channel. The RUN pins have a maximum voltage In dual output (2 + 1) mode, TK/SS1 and TK/SS2 need to of 6V. See the Applications Information section. be shorted externally. 4633f 8 For more information www.linear.com/LTM4633 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Related Parts