Datasheet LTM4676A (Analog Devices) - 10

LTM4676A
elecTrical characTerisTics Note 1:
Stresses beyond those listing under Absolute Maximum Ratings
Note 6:
See output current derating curves for different VIN, VOUT, and TA, may cause permanent damage to the device. Exposure to any Absolute located in the Applications Information section. Maximum Rating conditions for extended periods may affect device
Note 7:
Even though VOUT0 and VOUT1 are specified for 6V absolute reliability and lifetime. maximum, the maximum recommended regulation-command voltage is:
Note 2:
The LTM4676A is tested under pulsed-load conditions such that 5.5V for a high-VOUT range setting of MFR_PWM_MODEn[1]=0b; 2.5V for TJ ≈ TA. The LTM4676AE is guaranteed to meet performance specifications a low-VOUT range setting of MFR_PWM_MODEn[1]=1b. over the 0°C to 125°C internal operating temperature range. Specifications
Note 8:
Minimum on-time is tested at wafer sort. over the –40°C to 125°C internal operating temperature range are assured
Note 9:
Data conversion is performed in round-robin (cyclic) fashion. by design, characterization and correlation with statistical process All telemetry signals are continuously digitized, and reported data is controls. The LTM4676AI is guaranteed to meet specifications over the based on measurements not older than 90ms, typical. Some telemetry full –40°C to 125°C internal operating temperature range. Note that the parameters can be digitized at a faster update rate by configuring MFR_ maximum ambient temperature consistent with these specifications is ADC_CONTROL. determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental
Note 10:
The following telemetry parameters are formatted in PMBus- factors. defined “Linear Data Format”, in which each register contains a word comprised of 5 most significant bits—representing a signed exponent, to
Note 3:
The LTM4676A’s EEPROM temperature range for valid write be raised to the power of 2—and 11 least significant bits—representing commands is 0°C to 85°C. To achieve guaranteed EEPROM data retention, a signed mantissa: input voltage (on SV execution of the “STORE_USER_ALL” command—i.e., uploading RAM IN), accessed via the READ_VIN command code; output currents (I contents to NVM—outside this temperature range is not recommended. OUTn), accessed via the READ_IOUTn command codes; module input current (I However, as long as the LTM4676A’s EEPROM temperature is less than VIN0 + IVIN1 + ISVIN), accessed via the READ_IIN command code; channel input currents (I 130°C, the LTM4676A will obey the STORE_USER_ALL command. Only VINn + 1/2 • ISVIN), accessed via the MFR_READ_IIN when EEPROM temperature exceeds 130°C, the LTM4676A will not act n command codes;and duty cycles of channel 0 and channel 1 switching power stages, accessed via the on any STORE_USER_ALL transactions: instead, the LTM4676A NACKs READ_DUTY_CYCLE the serial command and asserts its relevant CML (communications, n command codes. This data format limits the resolution of telemetry readback data to 10 bits even though the internal memory, logic) fault bits. EEPROM temperature can be queried prior ADC is 16 bits and the LTM4676A’s internal calculations use 32-bit words. to commanding STORE_USER_ALL; see the Applications Information section.
Note 11:
The absolute maximum rating for the SVIN pin is 28V. Input voltage telemetry (READ_VIN) is obtained by digitizing a voltage scaled
Note 4:
The two power inputs—VIN0 and VIN1—and their respective power down from the SV outputs—V IN pin. OUT0 and VOUT1—are tested independently in production. A shorthand notation is used in this document that allows these parameters
Note 12:
These typical parameters are based on bench measurements and to be refered to by “V are not production tested. INn” and “VOUTn”, where n is permitted to take on a value of 0 or 1. This italicized, subscripted “n” notation and convention
Note 13:
EEPROM endurance and retention are guaranteed by wafer-level is extended to encompass all such pin names, as well as register names testing for data retention. The minimum retention specification applies with channel-specific, i.e., paged data. For example, VOUT_COMMAND for devices whose EEPROM has been cycled less than the minimum n refers to the VOUT_COMMAND command code data located in Pages 0 endurance specification, and whose EEPROM data was written to at and 1, which in turn relate to Channels 0 (V 0°C ≤ T OUT0) and Channel 1 (VOUT1). J ≤ 85°C. Downloading NVM contents to RAM by executing Registers containing non-page-specific data, i.e., whose data is “global” to the RESTORE_USER_ALL or MFR_RESET commands is valid over the the module or applies to both of the module's Channels lack the italicized, entire operating temperature range and does not influence EEPROM subscripted “n”, e.g., FREQUENCY_SWITCH. characteristics.
Note 5:
V
Note 14:
Channel 0 OV/UV comparator threshold accuracy for OUTn (DC) and line and load regulation tests are performed in production with digital servo disengaged (MFR_PWM_MODE MFR_PWM_MODE + – V – = n[6] = 0b) 0[1] = 1b tested in ATE at VVOSNS0 VOSNS0 and low V 0.5V and 2.7V. 1V condition tested at IC-Level, only. Channel 1 OV/UV OUTn range selected (MFR_PWM_MODEn[1]) = 1b. The digital servo control loop is exercised in production (setting MFR_PWM_ comparator threshold accuracy for MFR_PWM_MODE1[1] = 1b tested MODE in ATE with V n[6] = 1b), but convergence of the output voltage to its final settling VOSNS1-VSGND = 0.5V and 2.7V. 1.5V condition tested at value is not necessarily observed in final test—due to potentially long IC-level, only. time constants involved—and is instead guaranteed by the output voltage
Note 15:
Tested at IC-level ATE. readback accuracy specification. Evaluation in application demonstrates capability; see the Typical Performance Characteristics section. 4676afa 10 For more information www.linear.com/LTM4676A Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4676A In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photograph Package Description Revision History Typical Application Design Resources Related Parts