Datasheet LTM4636-1 (Analog Devices) - 10

LTM4636-1 BLOCK DIAGRAM IN TE 2200pF + TIONAL , TIE TO V TOGETHER, 0.85V OP V CC TEMP – 0.85V) (15K) IN ≤ 5.5V > 5.5V OPERA (V 22µF 15k V IN 4.70V TO 15V V IN AND P TIE RUNP TO GND. V IN AS SHOWN T 40A V OUT C IN C OUT R1 = R1 1.5V A UVLO + 2.2Ω, 0805 + V IN EXAMPLE – – CC M – + V IN SW 46361 F01 PV V OUT GND RUNP SNSP2 TEMP TEMP GMON TMON PW 2.2Ω V OUTS1 V OUTS1 OTP_SET OVP_SET CROWBAR 2.2µF 24.9k 1% SGND F 1µ – SNS 220pF CONNECT TO SNSP1 > 0.85V = ON TOR WORK 0.18µH 470pF V IN DCR SENSE NET SNSP2 5V Q1 TMON CC – + PV M1 M2 INTERNAL 5V REGULA BIAS F 1µ V V TDR BDR 24.9k 1% T 25°C T 150°C TMON IMON 40µA A 60µA A V OUT PWM LOGIC CONTOL, POWER MOSFET DRIVERS, POWER MOSFET TEMP MONITOR CURRENT 24.9k 1% TIMIZED + – µF OP DEAD TIME CONTROL PWM INPUT 150C DISABLE DISABLE 0.1 BIAS M T PCB SNSP1 TEST4 PW + SENSE – – CURRENT SNS SNSP1 AND SNSP2 – CONNECTED A DIFF 4.99k 0.5% AMP + V FB POWER CONTROL
Figure 1. Simplified LTM4636-1 Block Diagram
10pF 4.7µF 10k 1% 5.5V COMP INTERNAL A VCC TEST1 TEST2 TEST3 PGOOD RUNC COMP COMPB SGND HIZREG CLKOUT PHMODE FREQ TRACK/SS MODE_PLLIN INT SNSP1 V FB OVER_TEMP OVP_TRIP BIAS 10k V CC µF R6 0.1 V CC R FREQ 40k 3.24k INT T 15k CC INT AR PV T-ST SOF T ~ 3.75V PVCC = 5V > 1.35V = ON UVLO EXAMPLE – 1.35V)(10k)/1.35V DISABLES A V CC 15k = (P 46361fa 10 For more information www.linear.com/LTM4636-1