Datasheet LTM4678 (Analog Devices) - 10

LTM4678
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). TA = 25°C, VIN = 12V, RUNn = 3.3V, EXTVCC = 0, FREQUENCY_SWITCH = 575kHz and VOUTn commanded to 1.000V unless otherwise noted. Configured with factory-default EEPROM settings and per Test Circuit 1, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Input WP (Note 15)
IPUWP Input Pull-Up Current WP 10 µA
Open-Drain Outputs SCL, SDA, FAULTn , ALERT, RUNn , SHARE_CLK, PGOODn (Note 15)
VOL Output Low Voltage ISINK = 3mA 0.4 V
Digital Inputs SHARE_CLK, WP (Note 15)
VIH Input High Threshold Voltage l 1.5 1.8 V VIL Input Low Threshold Voltage l 0.6 1 V
Digital Filtering of FAULTn (Note 15)
IFLTG Input Digital Filtering FAULTn 3 µs
Digital Filtering of PGOODn (Note 15)
IFLTG Output Digital Filtering PGOODn 60 µs
Digital Filtering of RUNn (Note 15)
IFLTG Input Digital Filtering RUN 10 µs
PMBus Interface Timing Characteristics (Note 15)
fSCL Serial Bus Operating Frequency l 10 400 kHz tBUF Bus Free Time Between Stop and l 1.3 µs Start tHD(STA) Hold Time After Repeated Start l 0.6 µs Condition After This Period, the First Clock is Generated tSU(STA) Repeated Start Condition Setup l 0.6 10000 µs Time tSU(ST0) Stop Condition Setup Time l 0.6 µs tHD(DAT) Date Hold Time Receiving Data l 0 µs Transmitting Data l 0.3 0.9 µs tSU(DAT) Data Setup Time Receiving Data 0.1 µs tTIMEOUT_SMB Stuck PMBus Timer Non-Block Reads Measured from the Last PMBus Start Event 32 ms Stuck PMBus Timer Block Reads 255 tLOW Serial Clock Low Period l 1.3 10000 µs tHIGH Serial Clock High Period l 0.6 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings the ambient temperature TA and the power dissipation PD according the may cause permanent damage to the device. Exposure to any Absolute formula: Maximum Rating condition for extended periods may affect device TJ
=
TA + (PD
•
θJA) reliability and lifetime. Note that the maximum ambient temperature consistent with these
Note 2:
The LTM4678 is tested under pulsed-load conditions such that specifications is determined by specific operating conditions in TJ ≈ TA. The LTM4678E is guaranteed to meet performance specifications conjunction with board layout, the rated package thermal resistance and over the 0°C to 125°C internal operating temperature range. Specifications other environmental factors. over the –40°C to 125°C internal operating temperature range are assured
Note 3:
All currents into device pins are positive; all currents out of device by design, characterization and correlation with statistical process pins are negative. All voltages are referenced to ground unless otherwise controls. The LTM4678I is guaranteed to meet specifications over the full specified –40°C to 125°C internal operating temperature range. TJ is calculated from Rev 0 10 For more information www.analog.com Document Outline Functional Diagram Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins Table 1. VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 2. VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 3. FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) Table 4. ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) Table 5. LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Figure 5. LTM4678 Status Register Summary Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Table 6. Abbreviations of Supported Data Formats Figure 6. PMBus Timing Diagram Figures 7 to 24 PMBus Protocols PMBus Command Summary PMBus Commands Table 7. PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Table 8. Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Tables 10 thru 11: Output Current Derating Table 12. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Table 13. Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Dual Phase Single Output Voltage vs Component Selection, 25A to 50A/μs Load Step Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage Fault Responses Output Current Fault Responses IC Temperature Fault Responses External Temperature Fault Sharing Fault Sharing Propagation Fault Sharing Response Scratchpad Identification Fault Warning and Status MFR_INFO Data Contents: Telemetry NVM Memory Commands Store/Restore Fault Logging Block Memory Write/Read Package Description Table 22. LTM4678 BGA Pinout Typical Applications Design Resources Related Parts