Datasheet LT1019 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | Precision Reference |
| Seiten / Seite | 12 / 6 — TYPICAL PERFOR A CE CH. ARA TERISTICS. LT1019-2.5* Stability with. Temp … |
| Dateiformat / Größe | PDF / 164 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFOR A CE CH. ARA TERISTICS. LT1019-2.5* Stability with. Temp Pin Voltage. Line Regulation. Output Capacitance
Modelllinie für dieses Datenblatt
- LT1019ACN8-10#PBF LT1019ACN8-2.5#PBF LT1019ACN8-4.5#PBF LT1019ACN8-5#PBF LT1019ACS8-2.5#PBF LT1019ACS8-2.5#TRPBF LT1019ACS8-5#PBF LT1019ACS8-5#TRPBF LT1019AIS8-2.5#PBF LT1019AIS8-2.5#TRPBF LT1019AIS8-5#PBF LT1019AIS8-5#TRPBF LT1019CN8-10#PBF LT1019CN8-2.5#PBF LT1019CN8-4.5#PBF LT1019CN8-5#PBF LT1019CS8-10#PBF LT1019CS8-10#TRPBF LT1019CS8-2.5#PBF LT1019CS8-2.5#TRPBF LT1019CS8-4.5#PBF LT1019CS8-4.5#TRPBF LT1019CS8-5#PBF LT1019CS8-5#TRPBF LT1019IN8-10#PBF LT1019IN8-2.5#PBF LT1019IN8-4.5#PBF LT1019IN8-5#PBF LT1019IS8-2.5#PBF LT1019IS8-2.5#TRPBF LT1019IS8-5#PBF LT1019IS8-5#TRPBF
Textversion des Dokuments
LT1019
W U TYPICAL PERFOR A CE CH C ARA TERISTICS LT1019-2.5* Stability with Temp Pin Voltage Line Regulation Output Capacitance
0.90 140 10 IOUT 0.85 120 TJ = 25°C V) 0.80 µ 100 1 F) 0.75 80 µ REGION OF POSSIBLE 0.70 60 INSTABILITY 0.1 LT1019-10 0.65 40 0.60 20 VOLTAGE (V) 0.01 LT1019-2.5 0.55 0 LT1019-5 OUTPUT CAPACITOR ( 0.50 –10 OUTPUT VOLTAGE CHANGE ( 0.001 0.45 –20 0.40 –30 0.0001 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30 35 40 20 15 10 5 0 5 10 15 20 JUNCTION TEMPERATURE (°C) INPUT VOLTAGE (V) SINK CURRENT SOURCE CURRENT OUTPUT CURRENT (mA) LT1019 • TPC10 LT1019 • TPC11 1019 G12 *LT1019-4.5/LT1019-5/LT1019-10 ARE STABLE WITH ALL LOAD CAPACITANCE.
W BLOCK DIAGRA
R1 LT1019-2.5 = 11k LT1019-4.5 = 13.9k LT1019-5 = 16k LT1019-10 = 37.1k VIN R3 80k – TRIM R2 1.188V VOUT LT1019-4.5, LT1019-5, + LT1019-10 = 5k LT1019-2.5 = 10k GND LT1019 • BD
U U W U APPLICATIO S I FOR ATIO Line and Load Regulation
Two separate thermal effects are evident in monolithic circuits. One is a gradient effect, where power dissipation Line regulation on the LT1019 is nearly perfect. A 10V on the die creates temperature gradients. These gradients change in input voltage causes a typical output shift of less can cause output voltage shifts even if the overall tempera- than 5ppm. Load regulation (sourcing current) is nearly as ture coefficient of the reference is zero. The LT1019, unlike good. A 5mA change in load current shifts output voltage previous references, specifies thermal regulation caused by only 100µV. These are electrical effects, measured with by die temperature gradients.The specification is low duty cycle pulses to eliminate heating effects. In real 0.5ppm/mW. To calculate the effect on output voltage, world applications, the thermal effects of load and line simply multiply the change in device power dissipation by changes must be considered. 1019fd 6
W U TYPICAL PERFOR A CE CH C ARA TERISTICS LT1019-2.5* Stability with Temp Pin Voltage Line Regulation Output Capacitance
0.90 140 10 IOUT 0.85 120 TJ = 25°C V) 0.80 µ 100 1 F) 0.75 80 µ REGION OF POSSIBLE 0.70 60 INSTABILITY 0.1 LT1019-10 0.65 40 0.60 20 VOLTAGE (V) 0.01 LT1019-2.5 0.55 0 LT1019-5 OUTPUT CAPACITOR ( 0.50 –10 OUTPUT VOLTAGE CHANGE ( 0.001 0.45 –20 0.40 –30 0.0001 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30 35 40 20 15 10 5 0 5 10 15 20 JUNCTION TEMPERATURE (°C) INPUT VOLTAGE (V) SINK CURRENT SOURCE CURRENT OUTPUT CURRENT (mA) LT1019 • TPC10 LT1019 • TPC11 1019 G12 *LT1019-4.5/LT1019-5/LT1019-10 ARE STABLE WITH ALL LOAD CAPACITANCE.
W BLOCK DIAGRA
R1 LT1019-2.5 = 11k LT1019-4.5 = 13.9k LT1019-5 = 16k LT1019-10 = 37.1k VIN R3 80k – TRIM R2 1.188V VOUT LT1019-4.5, LT1019-5, + LT1019-10 = 5k LT1019-2.5 = 10k GND LT1019 • BD
U U W U APPLICATIO S I FOR ATIO Line and Load Regulation
Two separate thermal effects are evident in monolithic circuits. One is a gradient effect, where power dissipation Line regulation on the LT1019 is nearly perfect. A 10V on the die creates temperature gradients. These gradients change in input voltage causes a typical output shift of less can cause output voltage shifts even if the overall tempera- than 5ppm. Load regulation (sourcing current) is nearly as ture coefficient of the reference is zero. The LT1019, unlike good. A 5mA change in load current shifts output voltage previous references, specifies thermal regulation caused by only 100µV. These are electrical effects, measured with by die temperature gradients.The specification is low duty cycle pulses to eliminate heating effects. In real 0.5ppm/mW. To calculate the effect on output voltage, world applications, the thermal effects of load and line simply multiply the change in device power dissipation by changes must be considered. 1019fd 6