link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 Data SheetAD780DYNAMIC PERFORMANCEILOAD The output stage of the AD780 has been designed to provide 0mA superior static and dynamic load regulation. 10mA Figure 16 and Figure 17 show the performance of the AD780 while driving a 0 mA to 10 mA load. VOUT (CL = 1000pF)+VINOUTPUT CHANGE (50mV/DIV)2AD7806VOUT 00841-019 10 µ s/DIV1 µ F249 Ω Figure 19. Settling under Dynamic Capacitive Load LINE REGULATION4VOUTVL0V Line regulation is a measure of change in output voltage due to a specified change in input voltage. It is intended to simulate 00841-016 Figure 16. Transient Resistive Load Test Circuit worst-case unregulated supply conditions and is measured in µV/V. Figure 20 shows typical performance with 4.0 V < VIN < ILOAD 15.0 V. 0mA20010mAT = 25 ° CVOUT (CL = 0pF)100 µ V)0OUTPUT CHANGE (50mV/DIV)OUTPUT CHANGE ( –100 00841-017 10 µ s/DIV Figure 17. Settling Under Transient Resistive Load –200 00841-020 41015 The dynamic load may be resistive and capacitive. For example, INPUT VOLTAGE (V) the load may be connected via a long capacitive cable. Figure 18 Figure 20. Output Voltage Change vs. Input Voltage and Figure 19 show the performance of the AD780 driving a 1000 pF, 0 mA to 10 mA load. +VIN2AD7806VOUTCL1 µ F1000pF249 Ω 4VOUTVL0V 00841-018 Figure 18. Capacitive Load Transient Response Test Circuit Rev. I | Page 9 of 12 Document Outline Features Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Notes ESD Caution Theory of Operation Applying the AD780 Noise Performance Noise Comparison Temperature Performance Temperature Output Pin Temperature Transducer Circuit Supply Current Over Temperature Turn-On Time Dynamic Performance Line Regulation Precision Reference for High Resolution 5 V Data Converters 4.5 V Reference from 5 V Supply Negative (–2.5 V) Reference Outline Dimensions Ordering Guide