Datasheet LT1027LS8 (Analog Devices) - 7

LT1027LS8
applicaTions inForMaTion Effect of Reference Drift on System Accuracy Noise Reduction
A large portion of the temperature drift error budget in The positive input of the internal scaling amplifier is brought many systems is the system reference voltage. Figure 1 out as the Noise Reduction (NR) pin. Connecting a 1µF indicates the maximum temperature coefficient allowable Mylar capacitor between this pin and ground will reduce if the reference is to contribute no more than 0.5LSB error the wideband noise of the LT1027LS8 from 2.0µVRMS to to the overall system performance. The example shown is approximately 1.2µVRMS in a 10Hz to 1kHz bandwidth. a 12-bit system designed to operate over a temperature Transient response is not affected by this capacitor. Start-up range from 25°C to 65°C. Assuming the system calibration settling time will increase to several milliseconds due to is performed at 25°C, the temperature span is 40°C. It can the 7kΩ impedance looking into the NR pin. The capacitor be seen from the graph that the temperature coefficient must be a low leakage type. Electrolytics are not suitable of the reference must be no worse than 6ppm/°C if it is for this application. Just 100nA leakage current will result to contribute less than 1LSB error. For this reason, the in a 150ppm error in output voltage. This pin is the most LT1027LS8 has been optimized for low drift. sensitive pin on the device. For maximum protection a guard ring is recommended. The ring should be driven 100 from a resistive divider from VOUT set to 4.4V (the open- circuit voltage on the NR pin). 8-BIT
Transient Response
10-BIT The LT1027LS8 has been optimized for transient response. 10 Settling time is under 2µs when an AC-coupled 10mA load transient is applied to the output. The LT1027LS8 achieves 12-BIT 0.5LSB ERROR (ppm/°C) 14-BIT fast settling by using a class B NPN/PNP output stage. When sinking current, the device may oscillate with capacitive MAXIMUM TEMPERATURE COEFFICIENT FOR loads greater than 100pF. The LT1027LS8 is stable with 1.0 0 10 20 30 40 50 60 70 80 90 100 all capacitive loads when at no DC load or when sourcing TEMPERATURE SPAN (°C) current, although for best settling time either no output 1027LS8 F01 bypass capactor or a 4.7µF tantalum unit is recommended.
Figure 1. Maximum Allowable Reference Drift
An 0.1µF ceramic output capacitor will maximize output ringing and is not recommended.
Trimming Output Voltage Kelvin Connections
The LT1027LS8 has an adjustment pin for trimming output Although the LT1027LS8 does not have true force-sense voltage. The impedance of the VTRIM pin is approximately capability, proper hook-up can improve line loss and ground 20kΩ with an open-circuit voltage of 2.5V. A ±30mV loop problems significantly. Since the ground pin of the guaranteed trim range is achievable by tying the VTRIM pin LT1027LS8 carries only 2mA, it can be used as a low-side to the wiper of a 10k potentiometer connecting between sense line, greatly reducing ground loop problems on the the output and ground. Trimming output voltage does not low side of the reference. The VOUT pin should be close to affect the TC of the device. the load or connected via a heavy trace as the resistance of this trace directly affects load regulation. It is important to remember that a 1.22mV drop due to trace resistance is equivalent to a 1LSB error in a 5VFS, 12-bit system. 1027ls8f For more information www.linear.com/LT1027LS8 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts