LTM2885 PIN FUNCTIONS LOGIC SIDEGND (Pins B2-B5): Circuit Ground. TE (Pin A1): Terminator Enable. A logic high enables a VCC (Pins B6-B7): Supply Voltage. Recommended operat- termination resistor (typically 120Ω) between pins A ing voltage is 4.5V to 5.5V. Internally bypassed to GND and B. Do not float. with 2.2µF. DI (Pin A2): Driver Input. If the driver outputs are enabled NC (Pins C1-C7): No Connect. Pins with no internal (DE high), then a low on DI forces the driver noninverting connection. output (Y) low and the inverting output (Z) high. A high ISOLATED SIDE on DI, with the driver outputs enabled, forces the driver noninverting output (Y) high and inverting output (Z) low. NC (Pins R1-R7): No Connect. Pins with no internal connection. Do not float. DIN (Pin S1): General Purpose Isolated Logic Input. Logic DE (Pin A3): Driver Enable. A logic low disables the driver input on the isolated side relative to VCC2 and GND2. A leaving the outputs Y and Z in a high impedance state. A logic high on DIN will generate a logic high on DOUT. A logic logic high enables the driver. Do not float. low on DIN will generate a logic low on DOUT. Do not float. RE (Pin A4): Receiver Enable. A logic low enables the GND2 (Pins S2-S7): Isolated Side Circuit Ground. The receiver output. A logic high disables RO to a high imped- pads should be connected to the isolated ground and/or ance state. Do not float. cable shield. RO (Pin A5): Receiver Output. If the receiver output is SLO (Pin T1): Driver Slew Rate Control. A low input, rela- ena bled (RE low) and if A – B is > 200mV, RO is a logic tive to GND2, will force the driver into a reduced slew rate high, if A – B is < 200mV RO is a logic low. If the receiver mode for reduced EMI. A high input, relative to GND2, puts inputs are open, shorted, or terminated without a valid the driver into full speed mode to support maximum data signal for more than approximately 3μs, RO is a logic rates. Do not float. high. Under the condition of an isolation communication Y (Pin T2): Noninverting Driver Output. High impedance failure RO is in a high impedance state. when the driver is disabled. VL (Pin A6): Logic Supply. Interface supply voltage for Z (Pin T3): Inverting Driver Output. High impedance when pins RO, RE, TE, DI, DE, DOUT, and ON. Recommended the driver is disabled. operating voltage is 1.62V to 5.5V. Internally bypassed to GND with 2.2µF. B (Pin T4): Inverting Receiver Input. Impedance is > 96kΩ in all modes, powered and unpowered. ON (Pin A7): Enable. Enables power and data communica- tion through the isolation barrier. If ON is high the part is A (Pin T5): Noninverting Receiver Input. Impedance is enabled and power and communications are functional to > 96kΩ in all modes, powered and unpowered. the isolated side. If ON is low the logic side is held in reset VCC2 (Pins T6-T7): Isolated Supply Voltage. Internally and the isolated side is unpowered. Do not float. generated from VCC by an isolated DC/DC converter and D regulated to 5V. Internally bypassed to GND2 with 2.2µF. OUT (Pin B1): General Purpose Logic Output. Logic output connected through isolation path to DIN. Under the condition of an isolation communication failure DOUT is in a high impedance state. 2885fa For more information www.linear.com/LTM2885 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Switching Characteristics Isolation Characteristics Typical Performance Characteristics Pin Functions Block Diagram Test Circuits Functional Table Applications Information Typical Application Related Parts