Datasheet AT90S2333, AT90LS2333, AT90S4433, AT90LS4433 - Preliminary (Atmel) - 8
| Hersteller | Atmel |
| Beschreibung | 8-bit AVR Microcontroller with 2K/4K bytes In-System Programmable Flash |
| Seiten / Seite | 13 / 8 — Register Summary (Continued). Address. Name. Bit 7. Bit 6. Bit 5. Bit 4. … |
| Dateiformat / Größe | PDF / 320 Kb |
| Dokumentensprache | Englisch |
Register Summary (Continued). Address. Name. Bit 7. Bit 6. Bit 5. Bit 4. Bit 3. Bit 2. Bit 1. Bit 0. AT90S/LS2333 and AT90S/LS4433
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Textversion des Dokuments
Register Summary (Continued) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
$02 ($22) Reserved $01 ($21) Reserved $00 ($20) Reserved Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
8 AT90S/LS2333 and AT90S/LS4433
Document Outline Features Description Block Diagram Pin Descriptions VCC GND Port B (PB5..PB0) Port C (PC5..PC0) Port D (PD7..PD0) RESET XTAL1 XTAL2 AVCC AREF AGND Architectural Overview Register Summary (Continued) Instruction Set Summary (Continued) Ordering Information Pin Configurations
$02 ($22) Reserved $01 ($21) Reserved $00 ($20) Reserved Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.
8 AT90S/LS2333 and AT90S/LS4433
Document Outline Features Description Block Diagram Pin Descriptions VCC GND Port B (PB5..PB0) Port C (PC5..PC0) Port D (PD7..PD0) RESET XTAL1 XTAL2 AVCC AREF AGND Architectural Overview Register Summary (Continued) Instruction Set Summary (Continued) Ordering Information Pin Configurations