Datasheet AT90S8515 (Atmel) - 4

one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
The AT90S8515 provides the following features: 8K bytes of In-System Programmable
Flash, 512 bytes EEPROM, 512 bytes SRAM, 32 general-purpose I/O lines, 32 generalpurpose working registers, flexible timer/counters with compare modes, internal and
external interrupts, a programmable serial UART, programmable Watchdog Timer with
internal oscillator, an SPI serial port and two software-selectable power-saving modes.
The Idle Mode stops the CPU while allowing the SRAM, timer/counters, SPI port and
interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next external
interrupt or hardware reset.
The device is manufactured using Atmel’s high-density nonvolatile memory technology.
The On-chip In-System Programmable Flash allows the program memory to be reprogrammed In-System through an SPI serial interface or by a conventional nonvolatile
memory programmer. By combining an enhanced RISC 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT90S8515 is a powerful
microcontroller that provides a highly flexible and cost-effective solution to many embedded control applications.
The AT90S8515 AVR is supported with a full suite of program and system development
tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit
emulators and evaluation kits. Pin Descriptions
VCC Supply voltage. GND Ground. Port A (PA7.PA0) Port A is an 8-bit bi-directional I/O port. Port pins can provide internal pull-up resistors
(selected for each bit). The Port A output buffers can sink 20 mA and can drive LED displays directly. When pins PA0 to PA7 are used as inputs and are externally pulled low,
they will source current if the internal pull-up resistors are activated. The Port A pins are
tri-stated when a reset condition becomes active, even if the clock is not active.
Port A serves as multiplexed address/data input/output when using external SRAM. Port B (PB7.PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port B output
buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not active.
Port B also serves the functions of various special features of the AT90S8515 as listed
on page 66. Port C (PC7.PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port C output
buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not active.
Port C also serves as address output when using external SRAM. Port D (PD7.PD0) 4 Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output
buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source AT90S8515
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