Datasheet LTC3901 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters |
| Seiten / Seite | 16 / 5 — TYPICAL PERFOR A CE CHARACTERISTICS. CC Supply Current vs. CC Supply … |
| Dateiformat / Größe | PDF / 239 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFOR A CE CHARACTERISTICS. CC Supply Current vs. CC Supply Current. Temperature. vs Load Capacitance. PI FU CTIO S
Modelllinie für dieses Datenblatt
Textversion des Dokuments
LTC3901
W U TYPICAL PERFOR A CE CHARACTERISTICS V V CC Supply Current vs CC Supply Current Temperature vs Load Capacitance
20 30 C T LOAD = 4.7nF A = 25°C 18 25 VCC = 11V 16 VCC = 11V 20 14 12 15 10 10 SUPPLY CURRENT (mA) 8 SUPPLY CURRENT (mA) CC VCC = 5V V VCC = 5V 5 6 4 0 –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) CLOAD (nF) 3901 G15 3901 G16
U U U PI FU CTIO S PVCC (Pin 1):
Driver Supply Input. This pin powers the
GND (Pin 8,10):
Signal Ground. All internal low power ME and MF drivers. Bypass this pin to PGND using a 4.7µF circuitry returns to this pin. To minimize differential ground low ESR capacitor in close proximity to the LTC3901. This currents, connect GND to PGND right at the LTC3901. pin should be connected to the same supply voltage as the
SYNC (Pin 9):
Driver Synchronization Input. 0V at this pin VCC pin. forces both ME and MF high after an initial negative pulse.
ME (Pin 2, 3):
Driver Output for ME. This pin drives the A subsequent positive pulse at SYNC input forces ME to gate of the external N-channel MOSFET, ME. pull low, whereas a negative pulse forces MF to pull low. The SYNC signal should alternate between positive and
PGND (Pin 4,13):
Power Ground. Both drivers return to negative pulses. If the SYNC signal is incorrect, the LTC3901 this pin. Connect PGND to a high current ground node in pulls both MF and ME low. close proximity to the sources of ME and MF.
CSF+, CSF– (Pin 11, 12):
MF Current Sense Differential
CSE+, CSE– (Pin 6, 5):
ME Current Sense Differential Input. Connect CSF+ through a series resistor to the drain Input. Connect CSE+ through a series resistor to the drain of MF and CSF– through a series resistor to the source of of ME and CSE– through a series resistor to the source of MF. The LTC3901 monitors the CSF inputs 250ns after MF ME. The LTC3901 monitors the CSE inputs 250ns after ME goes high. If the inductor current reverses and flows into goes high. If the inductor current reverses and flows into MF causing CSF+ to rise above CSF– by more than 10.5mV, ME causing CSE+ to rise above CSE– by more than 10.5mV, the LTC3901 pulls MF low. See the Current Sense section the LTC3901 pulls ME low. See the Current Sense section for more details on choosing the resistance values for for more details on choosing the resistance values for R R CSF1 to RCSF3. CSE1 to RCSE3.
MF (Pin 14, 15):
Driver Output for MF. This pin drives the
TIMER (Pin 7):
Timer Input. Connect this pin to an external gate of the external N-channel MOSFET, MF. R-C network to program the timeout period. The LTC3901 resets the timer at every positive and negative transition of
VCC (Pin 16):
Power Supply Input. All internal circuits the SYNC input. If the SYNC signal is missing or incorrect, except the drivers are powered from this pin. Bypass this the LTC3901 pulls both ME and MF low once the TIMER pin to GND using a 1µF capacitor in close proximity to the pin goes above the timeout threshold. See the Timer sec- LTC3901. tion for more details on programming the timeout period. 3901f 5
W U TYPICAL PERFOR A CE CHARACTERISTICS V V CC Supply Current vs CC Supply Current Temperature vs Load Capacitance
20 30 C T LOAD = 4.7nF A = 25°C 18 25 VCC = 11V 16 VCC = 11V 20 14 12 15 10 10 SUPPLY CURRENT (mA) 8 SUPPLY CURRENT (mA) CC VCC = 5V V VCC = 5V 5 6 4 0 –50 –25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) CLOAD (nF) 3901 G15 3901 G16
U U U PI FU CTIO S PVCC (Pin 1):
Driver Supply Input. This pin powers the
GND (Pin 8,10):
Signal Ground. All internal low power ME and MF drivers. Bypass this pin to PGND using a 4.7µF circuitry returns to this pin. To minimize differential ground low ESR capacitor in close proximity to the LTC3901. This currents, connect GND to PGND right at the LTC3901. pin should be connected to the same supply voltage as the
SYNC (Pin 9):
Driver Synchronization Input. 0V at this pin VCC pin. forces both ME and MF high after an initial negative pulse.
ME (Pin 2, 3):
Driver Output for ME. This pin drives the A subsequent positive pulse at SYNC input forces ME to gate of the external N-channel MOSFET, ME. pull low, whereas a negative pulse forces MF to pull low. The SYNC signal should alternate between positive and
PGND (Pin 4,13):
Power Ground. Both drivers return to negative pulses. If the SYNC signal is incorrect, the LTC3901 this pin. Connect PGND to a high current ground node in pulls both MF and ME low. close proximity to the sources of ME and MF.
CSF+, CSF– (Pin 11, 12):
MF Current Sense Differential
CSE+, CSE– (Pin 6, 5):
ME Current Sense Differential Input. Connect CSF+ through a series resistor to the drain Input. Connect CSE+ through a series resistor to the drain of MF and CSF– through a series resistor to the source of of ME and CSE– through a series resistor to the source of MF. The LTC3901 monitors the CSF inputs 250ns after MF ME. The LTC3901 monitors the CSE inputs 250ns after ME goes high. If the inductor current reverses and flows into goes high. If the inductor current reverses and flows into MF causing CSF+ to rise above CSF– by more than 10.5mV, ME causing CSE+ to rise above CSE– by more than 10.5mV, the LTC3901 pulls MF low. See the Current Sense section the LTC3901 pulls ME low. See the Current Sense section for more details on choosing the resistance values for for more details on choosing the resistance values for R R CSF1 to RCSF3. CSE1 to RCSE3.
MF (Pin 14, 15):
Driver Output for MF. This pin drives the
TIMER (Pin 7):
Timer Input. Connect this pin to an external gate of the external N-channel MOSFET, MF. R-C network to program the timeout period. The LTC3901 resets the timer at every positive and negative transition of
VCC (Pin 16):
Power Supply Input. All internal circuits the SYNC input. If the SYNC signal is missing or incorrect, except the drivers are powered from this pin. Bypass this the LTC3901 pulls both ME and MF low once the TIMER pin to GND using a 1µF capacitor in close proximity to the pin goes above the timeout threshold. See the Timer sec- LTC3901. tion for more details on programming the timeout period. 3901f 5