HMC794LP3E v01.0612 2 GHz LOW NOISE PROGRAMMABLEDIVIDER (N = 1 to 4)Pin Description Pin number Function Description interface schematic t M s 1 vcc +5v voltage supply s - r o t c rF Positive input. e 2 rFinP input is Dc coupled, external Dc blocks required.. t e s & D r e rF negative input. 3 rFinn iD input is Dc coupled, external Dc blocks required... iv y D c 4 GnD this pin must be connected to rF/Dc ground. n e Division ratio (LsB) u 5 B0 see programming truth table. q e Division ratio (MsB) 6 B1 see programming truth table. r F 7 ctrL Divider output Buffer Power control 13 BiAs1 For proper operation this pin should be grounded. 14 BiAs0 Digital core Bias control [1] 15 en chip enable no connection required. this pin may be 8, 9, 12 n/c connected to ground, without affecting performance. [1] Divider core Bias control Bit Bias0 = 0v, Divider core Minimum Bias Bias0 = 5v, Divider core Maximum Bias I F nf o or r p mati r o in cfe ur , d nish e e l d iv b e y r A y a nalo n g d t Devi o p ces i la s c bele o ieve rd d t e o rbs e : H acc iutrtatite e M and ic reli rao bl w e. a H v o e C wever o , nrp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No rd Phoe n r O e: 7 n- 81-li 3 n 2 e a 9-4 t w 70 ww 0 • O . rdh e itt r o it nle i . n co e a m 7 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. t www.analog.com Application Support: Phon Trademarks and registered trademarks are the property of their respective owners. e: 978-250-334 A 3 o pplic r a atio pp n S s u @ p h por ittti : Pte. ho c n o e m : 1-800-ANALOG-D