Datasheet LTC7149 (Analog Devices) - 7

LTC7149 PIN FUNCTIONS
(QFN/TSSOP) VOUT – (Pins 1, 2, 26-28/Pins 1-5):
Negative Output of the the external clock is within this range or RT is set to ac- Step-Down Regulator. commodate the external clock for proper frequency lock.
VIN (Pin 3, 4/Pins 6, 7):
Input Supply Pin of the Step-
VOUTSNS (Pin 13/Pin 16):
Output Voltage Error Amplifier Down Regulator. Input Pin. For majority of applications, connect this pin
RUN (Pin 5/Pin 8):
Logic Controlled RUN Input. Do not to GND. leave this pin floating. Place a resistor divider from VIN to
ISET (Pin 14/Pin 17):
Accurate 50µA Bias Current and GND for an accurate VIN undervoltage threshold. Positive Input to the Error Amplifier. Connect an external
GND (Pins 6/Pins 9):
Board Ground Sense Pins. Connect resistor from this pin to VOUT – to program the output pins to PCB ground. voltage. Connecting an external capacitor from ISET to VOUT – will soft start the output voltage by reducing current
MODE/SYNC (Pin 7/Pin 10):
Mode Select and Oscillator inrush during start-up. Synchronization Input of the Step-Down Regulator. Leave MODE/SYNC floating for forced continuous mode opera-
ITH (Pin 15/Pin 18):
Error Amplifier Output and Switching tion or tie MODE/SYNC to GND for Burst Mode operation. Regulator Compensation Point. The current comparator’s Furthermore, connecting MODE/SYNC to an external clock trip threshold is linearly proportional to this voltage. Tying will synchronize the internal oscillator to the external clock this pin to INTVCC activates internal compensation. signal and put the part in forced continuous mode.
EXTVCC (Pin 16/ Pin 19):
External Power Input to the
PGOOD (Pin 8/Pin 11):
V Internal Regulator. The internal regulator will draw cur- OUT – Within Regulation Indica- tor. PGOOD is pulled to GND when V rent from EXTVCC instead of VIN when EXTVCC is tied to a PGDFB is more than 0.645V or less than 0.555V with respect to V voltage higher than 3.2V above VOUT – and VIN is 5V above OUT –. VOUT –. For output voltages at or below –3.3V, this pin can
PGDFB (Pin 9/Pin 12):
Power Good Feedback. Place a be tied to GND. If this pin is tied to a supply other than resistor divider from GND to VOUT – to detect power good GND, locally bypass with at least a 1µF to VOUT –. level.
INTVCC (Pin 17/Pin 20):
Low Dropout Regulator. Locally
VINREG (Pin 11/Pin 14):
Input Voltage Regulation Sense bypass with at least 1µF to VOUT –. Input. Place a resistor divider from VIN to VOUT – to program the level of input voltage regulation. To disable feature,
BOOST (Pin 18/Pin 21):
Boosted Floating Driver Supply connect the pin to INTVcc. for Internal Top Power MOSFET. Place a 0.1µF bootstrap capacitor between BOOST and SW.
RT (Pin 12/Pin 15):
Oscillator Frequency Programming Pin. Connect an external resistor between 500k to 40k from
SW (Pins 19-25/Pins 22-28):
Switch Node Connection to R the Inductor of the Regulator. T to SVOUT – to program the frequency from 200kHz to 2.5MHz respectively. Since the synchronization range is
SVOUT – (Pins 10, 29/Pins 13, 29):
The exposed pad must limited to ±50% of the set frequency, be sure that either be soldered to a PCB metal plane to SV – OUT for electrical connection and rated thermal performance. 7149fa For more information www.linear.com/LTC7149 7