Datasheet LTC1863L, LTC1867L (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | Micropower, 3V, 16-Bit, 8-Channel 175ksps ADCs |
| Seiten / Seite | 16 / 7 — TYPICAL PERFORMANCE CHARACTERISTICS (LTC1863L/ LTC1867L). Integral … |
| Dateiformat / Größe | PDF / 256 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFORMANCE CHARACTERISTICS (LTC1863L/ LTC1867L). Integral Nonlinearity. Differential Nonlinearity
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LTC1863L/LTC1867L
TYPICAL PERFORMANCE CHARACTERISTICS (LTC1863L/ LTC1867L) Integral Nonlinearity Differential Nonlinearity vs Output Code (LTC1863L) vs Output Code (LTC1863L)
1.00 1.00 0.75 0.75 0.50 0.50 0.25 0.25 0 0 INL (LSB) DNL (LSB) –0.25 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 0 512 1024 1536 2048 2560 3072 3584 4096 CODE CODE 1863L7L G16 1863L7L G17
PIN FUNCTIONS CHO-CH7/COM (Pins 1-8):
Analog Input Pins. Analog
SDO (Pin 13):
Digital Data Output. The A/D conversion inputs must be free of noise with respect to GND. CH7/ result is shifted out of this output. Straight binary for- COM can be either a separate channel or the common mat for unipolar mode and two’s complement format for minus input for the other channels. Unused channels bipolar mode. should be tied to ground.
SDI (Pin 14):
Digital Data Input Pin. The A/D configuration
REFCOMP (Pin 9):
Reference Buffer Output Pin. Bypass word is shifted into this input. to GND with a 10µF tantalum capacitor in parallel with
GND (Pin 15):
Analog and Digital GND. a 0.1µF ceramic capacitor (2.5V Nominal). To overdrive REFCOMP, tie VREF to GND.
VDD (Pin 16):
Analog and Digital Power Supply. Bypass to GND with a 10µF tantalum capacitor in parallel with
VREF (Pin 10):
1.25V Reference Output. This pin can also a 0.1µF ceramic capacitor. When powering up the be used as an external reference buffer input for improved LTC1863L/LTC1867L, or any time V accuracy and drift. Bypass to GND with a 2.2µF tantalum DD falls below the minimum specified operating voltage, one dummy con- capacitor in parallel with a 0.1µF ceramic capacitor. version must be initiated by providing a rising edge on the
CS/CONV (Pin 11):
This input provides the dual function CS/CONV pin. The first conversion result may be invalid of initiating conversions on the ADC and also frames the and should be ignored. Once the CS/CONV pin is returned serial data transfer. low, a DIN word can be shifted into SDI to program the
SCK (Pin 12):
Shift Clock. This clock synchronizes the configuration for the next conversion. Wait at least t7, the serial data transfer. SLEEP Mode Wake-Up Time of 80ms, before initiating the second conversion to obtain a valid conversion result. 1863l7lfe For more information www.linear.com/LTC1863L 7 Document Outline Description Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Package Description Related Parts
TYPICAL PERFORMANCE CHARACTERISTICS (LTC1863L/ LTC1867L) Integral Nonlinearity Differential Nonlinearity vs Output Code (LTC1863L) vs Output Code (LTC1863L)
1.00 1.00 0.75 0.75 0.50 0.50 0.25 0.25 0 0 INL (LSB) DNL (LSB) –0.25 –0.25 –0.50 –0.50 –0.75 –0.75 –1.00 –1.00 0 512 1024 1536 2048 2560 3072 3584 4096 0 512 1024 1536 2048 2560 3072 3584 4096 CODE CODE 1863L7L G16 1863L7L G17
PIN FUNCTIONS CHO-CH7/COM (Pins 1-8):
Analog Input Pins. Analog
SDO (Pin 13):
Digital Data Output. The A/D conversion inputs must be free of noise with respect to GND. CH7/ result is shifted out of this output. Straight binary for- COM can be either a separate channel or the common mat for unipolar mode and two’s complement format for minus input for the other channels. Unused channels bipolar mode. should be tied to ground.
SDI (Pin 14):
Digital Data Input Pin. The A/D configuration
REFCOMP (Pin 9):
Reference Buffer Output Pin. Bypass word is shifted into this input. to GND with a 10µF tantalum capacitor in parallel with
GND (Pin 15):
Analog and Digital GND. a 0.1µF ceramic capacitor (2.5V Nominal). To overdrive REFCOMP, tie VREF to GND.
VDD (Pin 16):
Analog and Digital Power Supply. Bypass to GND with a 10µF tantalum capacitor in parallel with
VREF (Pin 10):
1.25V Reference Output. This pin can also a 0.1µF ceramic capacitor. When powering up the be used as an external reference buffer input for improved LTC1863L/LTC1867L, or any time V accuracy and drift. Bypass to GND with a 2.2µF tantalum DD falls below the minimum specified operating voltage, one dummy con- capacitor in parallel with a 0.1µF ceramic capacitor. version must be initiated by providing a rising edge on the
CS/CONV (Pin 11):
This input provides the dual function CS/CONV pin. The first conversion result may be invalid of initiating conversions on the ADC and also frames the and should be ignored. Once the CS/CONV pin is returned serial data transfer. low, a DIN word can be shifted into SDI to program the
SCK (Pin 12):
Shift Clock. This clock synchronizes the configuration for the next conversion. Wait at least t7, the serial data transfer. SLEEP Mode Wake-Up Time of 80ms, before initiating the second conversion to obtain a valid conversion result. 1863l7lfe For more information www.linear.com/LTC1863L 7 Document Outline Description Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Pin Functions Package Description Related Parts