Datasheet TPS2410, TPS2411 (Texas Instruments) - 6
Hersteller | Texas Instruments |
Beschreibung | Full Feaured N+1 and ORing Power Rail Controller |
Seiten / Seite | 32 / 6 — TPS2410. TPS2411. www.ti.com. PW PACKAGE. (TOP VIEW). TERMINAL FUNCTIONS. … |
Revision | C |
Dateiformat / Größe | PDF / 1.4 Mb |
Dokumentensprache | Englisch |
TPS2410. TPS2411. www.ti.com. PW PACKAGE. (TOP VIEW). TERMINAL FUNCTIONS. TERMINAL. I/O. DESCRIPTION. NAME. NO
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Textversion des Dokuments
TPS2410 TPS2411
SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 ..
www.ti.com PW PACKAGE (TOP VIEW)
VDD PG RSET BYP STAT FLTR FLTB A OV C UV RSVD GND GATE
TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO.
Input power for the gate drive charge pump and internal controls. VDD must be connected to a supply voltage VDD 1 PWR ≥ 3 V. Connect a resistor to ground to program the turn-off threshold. Leaving RSET open results in a slightly RSET 2 I positive V(A-C) turn-off threshold. STAT is a multifunction pin. A high output indicates that the MOSFET gate is being driven high. Overdriving STAT 3 I/O STAT low while GATE is high shifts the fast-turnoff threshold negative. STAT has a weak pull-up to VDD. Open drain fault output. Fault is active (low) for any of the following conditions: 1. Insufficient VDD FLTB 4 O 2. GATE should be high but is not. 3. The MOSFET should be ON but the forward voltage exceeds 0.4 V. OV is a voltage monitor that contributes to the PG output, and also causes the MOSFET to turn off if it is OV 5 I above the 0.6-V threshold. OV is programmable via an external resistor divider. An OV voltage above 0.6 V indicates a bus voltage that is too high. UV is a voltage monitor that contributes to the PG output. The UV input has a 0.6 V threshold and is UV 6 I programmable via an external resistor divider. A UV voltage above 0.6V indicates a bus voltage that is above its minimum acceptable voltage. A low UV input does not effect the gate drive. GND 7 PWR Device ground. GATE 8 O Connect to the gate of the external MOSFET. Controls the MOSFET to emulate a low forward-voltage diode. RSVD 9 PWR This pin must be connected to GND. Voltage sense input that connects to the simulated diode cathode. Connect to the MOSFET drain in the C 10 I typical configuration. Voltage sense input that connects to the simulated diode anode. A also serves as the reference for the A 11 I charge-pump bias supply on BYP. Connect to the MOSFET source in the typical configuration. A capacitor connected from FLTR to A filters the input to the fast comparator. Filtering allows the TPS2410 to FLTR 12 I ignore spurious transients on the A and C inputs. This pin may be left open to achieve the fastest response time. BYP 13 I/O Connect a storage capacitor from BYP to A to filter the gate drive supply voltage. An open-drain Power Good indicator. PG is open if the UV input is above its threshold, the OV is below its PG 14 O threshold, and the internal UVLO is satisfied. 6 Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): TPS2410 TPS2411 Document Outline FEATURES APPLICATIONS DESCRIPTION ABSOLUTE MAXIMUM RATINGS DISSIPATION RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS: TPS2410/11 DETAILED DESCRIPTION TYPICAL CHARACTERISTICS APPLICATION INFORMATION OVERVIEW TPS2410 vs TPS2411 – MOSFET CONTROL METHODS N+1 POWER SUPPLY – TYPICAL CONNECTION INPUT ORing – TYPICAL CONNECTION SYSTEM DESIGN AND BEHAVIOR WITH TRANSIENTS RECOMMENDED OPERATING RANGE TPS2410 REGULATION-LOOP STABILITY MOSFET SELECTION AND R(RSET) GATE DRIVE, CHARGE PUMP AND C(BYP) FAST COMPARATOR INPUT FILTERING – C(FLTR) UV, OV, AND PG VDD, BYP, and POWERING OPTIONS INPUT ORing AND STAT BIDIRECTIONAL BLOCKING AND PROTECTION OF C ORing EXAMPLES SUMMARIZED DESIGN PROCEDURE Layout Considerations