LT1070 Design Manual (Linear Technology) - 7

Application Note 19
LT1070 OPERATION
obtained with additional windings. A special delay network inside the LT1070 ignores the leakage inductance spike at The LT1070 is a current mode switcher. This means that the leading edge of the flyback pulse to improve output switch duty cycle is directly controlled by switch current regulation. rather than by output voltage. Referring to the Block Diagram, the switch is turned “on” at the start of each The error signal developed at the comparator input is oscillator cycle. It is turned “off” when switch current brought out externally. This pin (VC) has four different reaches a predetermined level. Control of output voltage is functions. It is used for frequency compensation, current obtained by using the output of a voltage-sensing error limit adjustment, soft starting and total regulator shut- amplifier to set current trip level. This technique has down. During normal regulator operation this pin sits at a several advantages. First, it has immediate response to voltage between 0.9V (low output current) and 2V (high input voltage variations, unlike ordinary switchers which output current). The error amplifiers are current output have notoriously poor line transient response. Second, it (gm) types, so this voltage can be externally clamped for reduces the 90° phase shift at midfrequencies in the adjusting current limit. Likewise, a capacitor coupled energy storage inductor. This greatly simplifies closed- external clamp will provide soft start. Switch duty cycle loop frequency compensation under widely varying input goes to zero if the VC pin is pulled to ground through a voltage or output load conditions. Finally, it allows simple diode, placing the LT1070 in an idle mode. Pulling the VC pulse-by-pulse current limiting to provide maximum switch pin below 0.15V causes total regulator shutdown, with protection under output overload or short conditions. A only 50μA supply current for shutdown circuitry biasing. low dropout internal regulator provides a 2.3V supply for all internal circuitry on the LT1070. This low dropout design allows input voltage to vary from 3V to 60V with
Block Diagram
virtually no change in device performance. A 40kHz oscil- SWITCH lator is the basic clock for all internal timing. It turns “on” V OUT IN 16V the output switch via the logic and driver circuitry. Special adaptive antisat circuitry detects onset of saturation in the 2.3V REG power switch and adjusts driver current instantaneously FLYBACK ERROR to limit switch saturation. This minimizes driver dissipa- AMP tion and provides very rapid turn-off of the switch. 400kHz 5A, 75V A 1.2V bandgap reference biases the positive input of the LOGIC DRIVER OSC SWITCH error amplifier. The negative input is brought out for output voltage sensing. This feedback pin has a second MODE ANTISAT function; when pulled low with an external resistor, it SELECT COMP programs the LT1070 to disconnect the main error ampli- – fier output and connects the output of the flyback amplifier FB ERROR to the comparator input. The LT1070 will then regulate the V + C AMP value of the flyback pulse with respect to the supply + voltage. This flyback pulse is directly proportional to SHUTDOWN CURRENT 0.02Ω CIRCUIT output voltage in the traditional transformer coupled fly- AMP GAIN – back topology regulator. By regulating the amplitude of ≈ 6 the flyback pulse, the output voltage can be regulated with 1.24V 0.15V REF no direct connection between input and output. The output is fully floating up to the breakdown voltage of the trans- AN19 BD former windings. Multiple floating outputs are easily an19fc AN19-7