Datasheet KS8995M (Microchip) - 4

KS8995M Micrel, Inc. Table of Contents
System Level Applications . 7
Pin Description (by Number) . 9
Pin Description (by Name) . 15
Pin Configuration . 21
Introduction
. 22
Functional Overview: Physical Layer Transceiver . 22
100BaseTX Transmit . 22
100BaseTX Receive . 22
PLL Clock Synthesizer . 22
Scrambler/De-scrambler (100BaseTX only) . 22
100BaseFX Operation . 22
100BaseFX Signal Detection . 22
100BaseFX Far End Fault . 23
10BaseT Transmit . 23
10BaseT Receive . 23
Power Management . 23
MDI/MDI-X Auto Crossover . 23
Auto-Negotiation . 23
Functional Overview: Switch Core . 24
Address Look-Up . 24
Learning . 24
Migration . 24
Aging
. 24
Forwarding . 24
Switching Engine . 24
MAC Operation . 24
Inter-Packet Gap (IPG) . 24
Backoff Algorithm . 24
Late Collision . 26
Illegal Frames . 26
Flow Control . 26
Half-Duplex Back Pressure . 26
Broadcast Storm Protection . 26
MII Interface Operation . 26
SNI Interface Operation . 28
Advanced Functionality . 28
Spanning Tree Support . 28
Special Tagging Mode . 29
IGMP Support . 30
Port Mirroring Support . 31
VLAN Support . 31
Rate Limit Support . 32
Configuration Interface . 33
I2C Master Serial Bus Configuration . 35
SPI Slave Serial Bus Configuration . 35
MII Management Interface (MIIM) . 38 M9999-070506 4 July 2006