Datasheet KSZ8893MQL, KSZ8893MBL (Microchip) - 7
| Hersteller | Microchip |
| Beschreibung | Integrated 3-Port 10/100 Managed Switch with PHYs |
| Seiten / Seite | 116 / 7 — Micrel, Inc. KSZ8893MQL/MBL Register 114 (0x72): MAC Address Register 2 … |
| Dateiformat / Größe | PDF / 714 Kb |
| Dokumentensprache | Englisch |
Micrel, Inc. KSZ8893MQL/MBL Register 114 (0x72): MAC Address Register 2 .89
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Micrel, Inc. KSZ8893MQL/MBL Register 114 (0x72): MAC Address Register 2 .89
Register 115 (0x73): MAC Address Register 3 .89
Register 116 (0x74): MAC Address Register 4 .89
Register 117 (0x75): MAC Address Register 5 .89
Register 118 (0x76): User Defined Register 1 .90
Register 119 (0x77): User Defined Register 2 .90
Register 120 (0x78): User Defined Register 3 .90
Register 121 (0x79): Indirect Access Control 0.90
Register 122 (0x7A): Indirect Access Control 1 .90
Register 123 (0x7B): Indirect Data Register 8 .90
Register 124 (0x7C): Indirect Data Register 7 .91
Register 125 (0x7D): Indirect Data Register 6 .91
Register 126 (0x7E): Indirect Data Register 5 .91
Register 127 (0x7F): Indirect Data Register 4.91
Register 128 (0x80): Indirect Data Register 3.91
Register 129 (0x81): Indirect Data Register 2.91
Register 130 (0x82): Indirect Data Register 1.91
Register 131 (0x83): Indirect Data Register 0.91
Register 132 (0x84): Digital Testing Status 0.91
Register 133 (0x85): Digital Testing Control 0 .92
Register 134 (0x86): Analog Testing Control 0 .92
Register 135 (0x87): Analog Testing Control 1 .92
Register 136 (0x88): Analog Testing Control 2 .92
Register 137 (0x89): Analog Testing Control 3 .92
Register 138 (0x8A): Analog Testing Status.92
Register 139 (0x8B): Analog Testing Control 4.92
Register 140 (0x8C): QM Debug 1 .92
Register 141 (0x8D): QM Debug 2 .92
Static MAC Address Table.93
VLAN Table .94
Dynamic MAC Address Table.95
MIB (Management Information Base) Counters.96
Additional MIB Counter Information .98 Absolute Maximum Ratings(1) . 99
Operating Ratings(2) . 99
Electrical Characteristics(1) . 100
EEPROM Timing .102
SNI Timing.103
MII Timing.104
MAC Mode MII Timing .104
PHY Mode MII Timing.105
RMII Timing .106
I2C Slave Mode Timing .107
SPI Timing.108
Input Timing.108
Output Timing .109
Auto-Negotiation Timing.110 Reset Timing . 111
Reset Circuit . 112
Selection of Isolation Transformers . 113
Selection of Reference Crystal . 113
Package Information. 114 February 2010 7 M9999-021110-1.6
Register 115 (0x73): MAC Address Register 3 .89
Register 116 (0x74): MAC Address Register 4 .89
Register 117 (0x75): MAC Address Register 5 .89
Register 118 (0x76): User Defined Register 1 .90
Register 119 (0x77): User Defined Register 2 .90
Register 120 (0x78): User Defined Register 3 .90
Register 121 (0x79): Indirect Access Control 0.90
Register 122 (0x7A): Indirect Access Control 1 .90
Register 123 (0x7B): Indirect Data Register 8 .90
Register 124 (0x7C): Indirect Data Register 7 .91
Register 125 (0x7D): Indirect Data Register 6 .91
Register 126 (0x7E): Indirect Data Register 5 .91
Register 127 (0x7F): Indirect Data Register 4.91
Register 128 (0x80): Indirect Data Register 3.91
Register 129 (0x81): Indirect Data Register 2.91
Register 130 (0x82): Indirect Data Register 1.91
Register 131 (0x83): Indirect Data Register 0.91
Register 132 (0x84): Digital Testing Status 0.91
Register 133 (0x85): Digital Testing Control 0 .92
Register 134 (0x86): Analog Testing Control 0 .92
Register 135 (0x87): Analog Testing Control 1 .92
Register 136 (0x88): Analog Testing Control 2 .92
Register 137 (0x89): Analog Testing Control 3 .92
Register 138 (0x8A): Analog Testing Status.92
Register 139 (0x8B): Analog Testing Control 4.92
Register 140 (0x8C): QM Debug 1 .92
Register 141 (0x8D): QM Debug 2 .92
Static MAC Address Table.93
VLAN Table .94
Dynamic MAC Address Table.95
MIB (Management Information Base) Counters.96
Additional MIB Counter Information .98 Absolute Maximum Ratings(1) . 99
Operating Ratings(2) . 99
Electrical Characteristics(1) . 100
EEPROM Timing .102
SNI Timing.103
MII Timing.104
MAC Mode MII Timing .104
PHY Mode MII Timing.105
RMII Timing .106
I2C Slave Mode Timing .107
SPI Timing.108
Input Timing.108
Output Timing .109
Auto-Negotiation Timing.110 Reset Timing . 111
Reset Circuit . 112
Selection of Isolation Transformers . 113
Selection of Reference Crystal . 113
Package Information. 114 February 2010 7 M9999-021110-1.6