Datasheet AD8143 (Analog Devices) - 10

link to page 10 link to page 10 link to page 19
Data Sheet AD8143 ABSOLUTE MAXIMUM RATINGS
power dissipated due to all of the loads is equal to the sum of
Table 4.
the power dissipation due to each individual load. RMS voltages
Parameter Rating
and currents must be used in these calculations. Supply Voltage 24 V Power Dissipation See Figure 2 Airflow increases heat dissipation, effectively reducing θJA. In Storage Temperature Range –65°C to +125°C addition, more metal directly in contact with the package leads Operating Temperature Range –40°C to +85°C from metal traces, through-holes, ground, and power planes Lead Temperature Range (Soldering 10 sec) 300°C reduces the θJA. The exposed paddle on the underside of the Junction Temperature 150°C package must be soldered to a pad on the PCB surface which is thermally connected to a copper plane to achieve the specified θ Stresses at or above those listed under Absolute Maximum JA. Ratings may cause permanent damage to the product. This is a Figure 2 shows the maximum safe power dissipation in the stress rating only; functional operation of the product at these package vs. the ambient temperature for the 32-lead LFCSP or any other conditions above those indicated in the operational (45°C/W) on a JEDEC standard 4-layer board with the underside section of this specification is not implied. Operation beyond paddle soldered to a pad which is thermally connected to a PCB the maximum operating conditions for extended periods may plane. Extra thermal relief is required for operation at high affect product reliability. supply voltages. See the Applications Information section for details. θ
THERMAL RESISTANCE
JA values are approximations. θ
4.5
JA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in the circuit board with its
4.0
exposed paddle soldered to a pad on the PCB surface, which is
(W) N
thermally connected to a copper plane.
3.5 3.0 Table 5. Thermal Resistance Package Type θJA θJC Unit 2.5
5 mm × 5 mm, 32-Lead LFCSP 45 7 °C/W
WER DISSIPATIO 2.0 Maximum Power Dissipation 1.5
The maximum safe power dissipation in the AD8143 package is limited by the associated rise in junction temperature (T
MAXIMUM PO
J) on
1.0
056 the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily
0.5
05538-
–40 –20 0 20 40 60 80
exceeding this temperature limit can change the stresses that the
AMBIENT TEMPERATURE (°C)
package exerts on the die, permanently shifting the parametric Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board performance of the AD8143. Exceeding a junction temperature of 150°C for an extended period can result in changes in the
ESD CAUTION
silicon devices potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. The Rev. A | Page 9 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION OVERVIEW BASIC CLOSED-LOOP GAIN CONFIGURATIONS TERMINATING THE INPUT INPUT CLAMPING PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS Minimizing Parasitic Reactances in the Feedback Network Maximizing Heat Removal DRIVING A CAPACITIVE LOAD POWER-DOWN COMPARATORS SYNC PULSE EXTRACTION USING COMPARATORS OUTLINE DIMENSIONS ORDERING GUIDE