Datasheet AD712-EP (Analog Devices) - 4
| Hersteller | Analog Devices |
| Beschreibung | Dual Precision, Low Cost, High Speed BiFET Op Amp |
| Seiten / Seite | 12 / 4 — Parameter Min. Typ. Max. Unit |
| Dateiformat / Größe | PDF / 206 Kb |
| Dokumentensprache | Englisch |
Parameter Min. Typ. Max. Unit
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Textversion des Dokuments
AD712-EP
Parameter Min Typ Max Unit
OPEN-LOOP GAIN 150 V/mV TMIN to TMAX 100 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing High 13.9 13.0 V TMIN to TMAX 12.0 V Output Voltage Swing Low −12.5 −13.1 V TMIN to TMAX −12.0 V Current 25 mA POWER SUPPLY Rated Performance ±15 V Operating Range ±4.5 ±18 V Quiescent Current 5.0 6.8 mA 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = 25°C. 2 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = 25°C. For higher temperatures, the current doubles every 10°C. 3 Defined as voltage between inputs, such that neither exceeds ±10 V from ground. 4 Typically exceeding −14.1 V negative common-mode voltage on either input results in an output phase reversal. Rev. 0 | Page 4 of 12 Document Outline FEATURES GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
Parameter Min Typ Max Unit
OPEN-LOOP GAIN 150 V/mV TMIN to TMAX 100 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing High 13.9 13.0 V TMIN to TMAX 12.0 V Output Voltage Swing Low −12.5 −13.1 V TMIN to TMAX −12.0 V Current 25 mA POWER SUPPLY Rated Performance ±15 V Operating Range ±4.5 ±18 V Quiescent Current 5.0 6.8 mA 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at TA = 25°C. 2 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at TA = 25°C. For higher temperatures, the current doubles every 10°C. 3 Defined as voltage between inputs, such that neither exceeds ±10 V from ground. 4 Typically exceeding −14.1 V negative common-mode voltage on either input results in an output phase reversal. Rev. 0 | Page 4 of 12 Document Outline FEATURES GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE