Datasheet AD8643-EP (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | Low Power, Rail-to-Rail, Output Precision JFET Amplifier |
| Seiten / Seite | 12 / 10 — AD8643-EP. 1000. VSY =. 13V. VS =. G = +100. GAIN = +5. 100. TS + (1%). … |
| Dateiformat / Größe | PDF / 255 Kb |
| Dokumentensprache | Englisch |
AD8643-EP. 1000. VSY =. 13V. VS =. G = +100. GAIN = +5. 100. TS + (1%). TS + (0.1%). G (V. G = +10. P T. G = +1. TS – (0.1%). 0.1. –10. TS – (1%). 0.01. –15
Modelllinie für dieses Datenblatt
Textversion des Dokuments
AD8643-EP 1000 15 VSY =
±
13V VS =
±
13V G = +100 GAIN = +5 10 100 TS + (1%) ) 5 TS + (0.1%) 10 G (V ) IN (
Ω
W T G = +10 0 S OU T Z U 1 P T G = +1 –5 OU TS – (0.1%) 0.1 –10 TS – (1%) 0.01 –15
0
1k 10k 100k 1M 10M 100M 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-027 -03 90
FREQUENCY (Hz)
09590
SETTLING TIME (
μ
s)
095 Figure 26. Output Impedance vs. Frequency Figure 29. Output Swing and Error vs. Settling Time
1000 70 VSY = 5V VS =
±
13V G = +100 R 60 L = 10k
Ω
VIN = 100mV p-p 100 AV = +1 50 ) % 10 ( ) T
Ω
40 O ( G = +10 O T OU SH OS– Z 30 1 G = +1 VER O OS+ 20 0.1 10 0.01 0 1k 10k 100k 1M 10M 100M
1 028
1 10 100 1000
0- -03
FREQUENCY (Hz)
590 0959
CAPACITANCE (pF)
09 Figure 27. Output Impedance vs. Frequency Figure 30. Small Signal Overshoot vs. Load Capacitance
T 70 VSY =
±
13V VS =
±
2.5V R 60 L = 10k
Ω
VIN = 100mV p-p 1 AV = +1 VIN 50 ) % ( T 40 O OS– O SH 30 VER O OS+ 20 2 VOUT 10 0 CH1 10.0V CH2 10.0V M400
μ
s A CH1 1.00V
-029
1 10 100 1000
2
T 0.00000s
590 -03 09
CAPACITANCE (pF)
590 09 Figure 28. No Phase Reversal Figure 31. Small Signal Overshoot vs. Load Capacitance Rev. 0 | Page 10 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
±
13V VS =
±
13V G = +100 GAIN = +5 10 100 TS + (1%) ) 5 TS + (0.1%) 10 G (V ) IN (
Ω
W T G = +10 0 S OU T Z U 1 P T G = +1 –5 OU TS – (0.1%) 0.1 –10 TS – (1%) 0.01 –15
0
1k 10k 100k 1M 10M 100M 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-027 -03 90
FREQUENCY (Hz)
09590
SETTLING TIME (
μ
s)
095 Figure 26. Output Impedance vs. Frequency Figure 29. Output Swing and Error vs. Settling Time
1000 70 VSY = 5V VS =
±
13V G = +100 R 60 L = 10k
Ω
VIN = 100mV p-p 100 AV = +1 50 ) % 10 ( ) T
Ω
40 O ( G = +10 O T OU SH OS– Z 30 1 G = +1 VER O OS+ 20 0.1 10 0.01 0 1k 10k 100k 1M 10M 100M
1 028
1 10 100 1000
0- -03
FREQUENCY (Hz)
590 0959
CAPACITANCE (pF)
09 Figure 27. Output Impedance vs. Frequency Figure 30. Small Signal Overshoot vs. Load Capacitance
T 70 VSY =
±
13V VS =
±
2.5V R 60 L = 10k
Ω
VIN = 100mV p-p 1 AV = +1 VIN 50 ) % ( T 40 O OS– O SH 30 VER O OS+ 20 2 VOUT 10 0 CH1 10.0V CH2 10.0V M400
μ
s A CH1 1.00V
-029
1 10 100 1000
2
T 0.00000s
590 -03 09
CAPACITANCE (pF)
590 09 Figure 28. No Phase Reversal Figure 31. Small Signal Overshoot vs. Load Capacitance Rev. 0 | Page 10 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE