Datasheet LT1249 (Linear Technology) - 7
| Hersteller | Linear Technology |
| Beschreibung | Power Factor Controller |
| Seiten / Seite | 12 / 7 — APPLICATIONS INFORMATION Line Current Limiting. Figure 2. Synchronizing … |
| Revision | S |
| Dateiformat / Größe | PDF / 203 Kb |
| Dokumentensprache | Englisch |
APPLICATIONS INFORMATION Line Current Limiting. Figure 2. Synchronizing the LT1249. Overvoltage Protection. Synchronization
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LT1249
U U W U APPLICATIONS INFORMATION Line Current Limiting
With ts = 30ns, fs = 130kHz, VC = 3V and R2 = 10k, offset Maximum voltage across R voltage shift is ≈5mV. Note that this offset voltage will add MOUT is internally limited to 1.1V. Therefore, line current limit is 1.1V divided by the slight distortion to line current at light load. sense resistor RS. With a 0.2Ω sense resistor RS line current limit is 5.5A. As a general rule, R CA V S is chosen OUT CC according R1 1N5712 10k I ( ) R ( ) V 80pF M M ( AX) MOUT ( LINE MIN ) ( ) R R2 5V S = 2N2369 K( . 1 414 P ) 10k 0V OUT MAX ( ) 2k 1nF where P 1249 F02 OUT(MAX) is the maximum power output and K is usually between 1.1 and 1.3 depending on efficiency and resistor tolerance. When the output is overloaded and line
Figure 2. Synchronizing the LT1249
current reaches limit, output voltage VOUT will drop to keep line current constant. System stability is still maintained
Overvoltage Protection
by the current loop which is controlled by the current In Figure 3, R1 and R2 set the regulator output DC level: amplifier. Further load current increase results in further V V OUT = VREF[(R1 + R2)/R2]. With R1 = 1M and R2 = 20k, OUT drop and clipping of the line current, which degrades V power factor. OUT is 382V. Because of the slow loop response necessary for power
Synchronization
factor correction, output overshoot can occur with sudden The LT1249 can be externally synchronized in a frequency load removal or reduction. To protect the power compo- range of 127kHz to 160kHz. Figure 2 shows the synchro- nents and output load, the LT1249 voltage error amplifier nizing circuit. Synchronizing occurs when CA senses the output voltage and quickly shuts off the current OUT pin is pulled below 0.5V with an external transistor and a Schottky switch when overvoltage occurs. When overshoot occurs diode. The Schottky diode and the 10k pull-up resistor are on VOUT, the overcurrent from R1 will go through VAOUT necessary for the required fast slewing back up to the because amplifier feedback keeps VSENSE locked at 7.5V. normal operating voltage on CA When this overcurrent reaches 44µA amplifier sinking OUT after the transistor is turned off. Positive slewing on CA limit, the amplifier loses feedback and its output snaps low OUT should be faster than the oscillator ramp rate of 0.5V/µs. to turn the multiplier off. The width of the synchronizing pulse should be under Overvoltage trip level: ∆VOUT = (44µA)(R1) 60ns. The synchronizing pulses introduce an offset volt- 0.047µF V age on the current amplifier inputs, according to: OUT C1 V − . 0 5 ( 0.47µF R3 ts)(fs) I C 330k C + ∆ R2 VOS = R1 gm 1M VSENSE – VAOUT ts = pulse width EA + R2 fs = pulse frequency 44µA 20k I MULTIPLIER V 22µA C = CAOUT source current (≈ 150µA) REF 7.5V VC = CAOUT operating voltage (1.8V to 6.8V) LT1249 R2 = resistor for the midfrequency “zero” in the current loop 1249 F03 gm = current amplifier transconductance (≈ 320µmho)
Figure 3. Overvoltage Protection
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U U W U APPLICATIONS INFORMATION Line Current Limiting
With ts = 30ns, fs = 130kHz, VC = 3V and R2 = 10k, offset Maximum voltage across R voltage shift is ≈5mV. Note that this offset voltage will add MOUT is internally limited to 1.1V. Therefore, line current limit is 1.1V divided by the slight distortion to line current at light load. sense resistor RS. With a 0.2Ω sense resistor RS line current limit is 5.5A. As a general rule, R CA V S is chosen OUT CC according R1 1N5712 10k I ( ) R ( ) V 80pF M M ( AX) MOUT ( LINE MIN ) ( ) R R2 5V S = 2N2369 K( . 1 414 P ) 10k 0V OUT MAX ( ) 2k 1nF where P 1249 F02 OUT(MAX) is the maximum power output and K is usually between 1.1 and 1.3 depending on efficiency and resistor tolerance. When the output is overloaded and line
Figure 2. Synchronizing the LT1249
current reaches limit, output voltage VOUT will drop to keep line current constant. System stability is still maintained
Overvoltage Protection
by the current loop which is controlled by the current In Figure 3, R1 and R2 set the regulator output DC level: amplifier. Further load current increase results in further V V OUT = VREF[(R1 + R2)/R2]. With R1 = 1M and R2 = 20k, OUT drop and clipping of the line current, which degrades V power factor. OUT is 382V. Because of the slow loop response necessary for power
Synchronization
factor correction, output overshoot can occur with sudden The LT1249 can be externally synchronized in a frequency load removal or reduction. To protect the power compo- range of 127kHz to 160kHz. Figure 2 shows the synchro- nents and output load, the LT1249 voltage error amplifier nizing circuit. Synchronizing occurs when CA senses the output voltage and quickly shuts off the current OUT pin is pulled below 0.5V with an external transistor and a Schottky switch when overvoltage occurs. When overshoot occurs diode. The Schottky diode and the 10k pull-up resistor are on VOUT, the overcurrent from R1 will go through VAOUT necessary for the required fast slewing back up to the because amplifier feedback keeps VSENSE locked at 7.5V. normal operating voltage on CA When this overcurrent reaches 44µA amplifier sinking OUT after the transistor is turned off. Positive slewing on CA limit, the amplifier loses feedback and its output snaps low OUT should be faster than the oscillator ramp rate of 0.5V/µs. to turn the multiplier off. The width of the synchronizing pulse should be under Overvoltage trip level: ∆VOUT = (44µA)(R1) 60ns. The synchronizing pulses introduce an offset volt- 0.047µF V age on the current amplifier inputs, according to: OUT C1 V − . 0 5 ( 0.47µF R3 ts)(fs) I C 330k C + ∆ R2 VOS = R1 gm 1M VSENSE – VAOUT ts = pulse width EA + R2 fs = pulse frequency 44µA 20k I MULTIPLIER V 22µA C = CAOUT source current (≈ 150µA) REF 7.5V VC = CAOUT operating voltage (1.8V to 6.8V) LT1249 R2 = resistor for the midfrequency “zero” in the current loop 1249 F03 gm = current amplifier transconductance (≈ 320µmho)
Figure 3. Overvoltage Protection
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