Datasheet ADIS16260, ADIS16265 (Analog Devices) - 4

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ADIS16260/ADIS16265 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
DAC OUTPUT 5 kΩ/100 pF to GND Resolution 12 Bits Relative Accuracy For Code 101 to Code 4095 4 LSB Differential Nonlinearity 1 LSB Offset Error ±5 mV Gain Error ±0.5 % Output Range 0 2.5 V Output Impedance 2 Ω Output Settling Time 10 µs LOGIC INPUTS Internal 3.3 V interface Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Logic 1 Input Current, IINH VIH = 3.3 V ±0.2 ±10 µA Logic 0 Input Current, IINL VIL = 0 V All Except RST −40 −60 µA RST The RST pin has an internal pull-up. −1 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS Internal 3.3 V interface Output High Voltage, VOH ISOURCE = 1.6 mA 2.4 V Output Low Voltage, VOL ISINK = 1.6 mA 0.4 V SLEEP TIMER Timeout Period3 0.5 128 sec START-UP TIME Initial Start-Up Time 165 ms Sleep Mode Recovery 2.5 ms Flash Update Time 50 ms Flash Test Process Time Normal mode, SMPL_PRD[7:0] ≤ 0x07 18 ms Low power mode, SMPL_PRD[7:0] ≥ 0x08 70 ms FLASH MEMORY Endurance4 20,000 Cycles Data Retention5 TJ = 55°C 10 Years CONVERSION RATE Minimum Conversion Time SMPL_PRD[7:0] = 0x00 0.488 ms Maximum Conversion Time SMPL_PRD[7:0] = 0xFF 7.75 sec Maximum Throughput Rate SMPL_PRD[7:0] = 0x00 2048 SPS Minimum Throughput Rate SMPL_PRD[7:0] = 0xFF 0.129 SPS POWER SUPPLY Operating Voltage Range, VCC 4.75 5.0 5.25 V Power Supply Current Low power mode, SMPL_PRD[7:0] ≥ 0x08 17 mA Normal mode, SMPL_PRD[7:0] ≤ 0x07 41 mA Sleep mode 350 µA 1 ADIS16260/ADIS16265 characterization data represents ±4σ to fall within the ±1% limit. 2 The maximum guaranteed measurement range is ±320°/sec. The sensor outputs will measure beyond this range, but performance is not assured. 3 Guaranteed by design. 4 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 5 Retention lifetime equivalent at a junction temperature (TJ) of 55°C, as per JEDEC Standard 22, Method A117. Retention lifetime decreases with junction temperature. Rev. E | Page 4 of 20 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Sensing Element Data Sampling and Processing User Interface SPI Interface User Registers Basic Operation SPI Write Commands SPI Read Commands Memory Map Processing Sensor Data Operational Controls Internal Sample Rate Sensor Bandwidth Digital Filtering Dynamic Range Calibration Global Commands Power Management Input/Output Functions General-Purpose I/O Data Ready I/O Indicator Auxiliary DAC Diagnostics Self-Test Memory Test Status Alarm Registers Product Identification Applications Information Assembly Bias Optimization Interface Printed Circuit Board (PCB) Outline Dimensions Ordering Guide