Datasheet ADXRS450 (Analog Devices) - 9

ADXRS450 Data Sheet 1 40 60 DUT1 30 50 DUT2 ) DUT AVERAGE (°/s) 0.1 20 REF 40 ) √Hz g ) N ( °/s/ °/s 10 30 IO T ( T ( U U RAT TP E 0.01 TP 0 20 L O OU O OU R R –10 10 ACCE GY GY UT 0.001 –20 0 INP –30 –10 0.0001 –40 –20 5 10 100 300
031
0.1 0.15 0.20 0.25 0.30 0.35 0.40
034
FREQUENCY (Hz) TIME (sec)
08952- 08952- Figure 12. DUT Typical Response to Random Vibration Figure 14. Typical Shock Response (5 Hz to 5 kHz at 15 g RMS)
8 86 6 84 4 82 2 /°/sec) B (°/sec) S T L F ( 0 Y 80 T DRI IVI L T –2 SI NUL 78 SEN –4 76 –6 –8 74
17
–50 –25 0 25 50 75 100 125
14 1
–50 –25 0 25 50 75 100 125
1
TEMPERATURE (°C) TEMPERATURE (°C)
08952- 08952- Figure 13. Null Drift over Temperature Figure 15. Sensitivity over Temperature Rev. C | Page 8 of 28 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Rate Sensitive Axis ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Continuous Self-Test Applications Information Mechanical Considerations for Mounting Applications Circuits ADXRS450 Signal Chain Timing SPI Communication Protocol Command/Response SPI Communications Characteristics SPI Applications Device Data Latching Command/Response—Bit Definitions SQ2 to SQ0 SM2 to SM0 A8 to A0 D15 to D0 SPI ST1 to ST0 P P0 P1 RE DU Fault Register Bit Definitions PLL Q NVM POR PWR CST CHK OV UV Fail Amp K-Bit Assertion: Recommended Start-Up Routine SPI Rate Data Format Memory Map and Registers Memory Map Memory Register Definitions Rate Registers Temperature (TEMx) Registers Low CST (LOCST) Memory Registers High CST (HICST) Memory Registers Quad Memory Registers Fault Registers Part ID (PID) Registers Serial Number (SN) Registers Dynamic Null Correction (DNC) Registers Package Orientation and Layout Information Package Marking Codes Outline Dimensions Ordering Guide