Datasheet ADXRS450 (Analog Devices)

HerstellerAnalog Devices
Beschreibung±300°/sec High Vibration Immunity Digital Gyro
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RevisionC
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High Performance,. Digital Output Gyroscope. Data Sheet. ADXRS450. FEATURES. GENERAL DESCRIPTION

Datasheet ADXRS450 Analog Devices, Revision: C

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High Performance, Digital Output Gyroscope Data Sheet ADXRS450 FEATURES GENERAL DESCRIPTION Complete rate gyroscope on a single chip
The ADXRS450 is an angular rate sensor (gyroscope) intended
±300°/sec angular rate sensing
for industrial, medical, instrumentation, stabilization, and other
High vibration rejection over a wide frequency range
high performance applications. An advanced, differential, quad
Excellent 25°/hour null offset stability
sensor design rejects the influence of linear acceleration, enabling
2000 g powered shock survivability
the ADXRS450 to operate in exceedingly harsh environments
SPI digital output with 16-bit data-word
where shock and vibration are present.
Low noise and low power
The ADXRS450 uses an internal, continuous self-test archi-
3.3 V and 5 V operation
tecture. The integrity of the electromechanical system is checked
−40°C to +105°C operation
by applying a high frequency electrostatic force to the sense
Ultrasmall, light, and RoHS compliant
structure to generate a rate signal that can be differentiated from
Two package options
the baseband rate data and internally analyzed.
Low cost SOIC_CAV package for yaw rate (Z-axis) response Innovative ceramic vertical mount package, which can be
The ADXRS450 is capable of sensing angular rate of up to
oriented for pitch, roll, or yaw response
±300°/sec. Angular rate data is presented as a 16-bit word, as part of a 32-bit SPI message.
APPLICATIONS
The ADXRS450 is available in a cavity plastic 16-lead SOIC
Rotation sensing medical applications
(SOIC_CAV) and an SMT-compatible vertical mount package
Rotation sensing industrial and instrumentation
(LCC_V), and is capable of operating across both a wide voltage
High performance platform stabilization
range (3.3 V to 5 V) and temperature range (−40°C to +105°C).
FUNCTIONAL BLOCK DIAGRAM CP5 VX HIGH VOLTAGE P GENERATION DD ADXRS450 LDO REGULATOR DVDD HV DRIVE AVDD CLOCK ALU PHASE- DIVIDER LOCKED DECIMATION LOOP Y AMPLITUDE FILTER R DETECT MO MOSI TEMPERATURE ME BAND-PASS CALIBRATION S/ DEMOD SPI MISO FILTER ADC 12 INTERFACE ER SCLK IST CS G FAULT E Q FILTER R Q DAQ DETECTION Z-AXIS ANGULAR RATE SENSOR DV ST SS P DAQ CONTROL PSS AVSS EEPROM
01 0 2- 95 08 Figure 1.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings Thermal Resistance Rate Sensitive Axis ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Continuous Self-Test Applications Information Mechanical Considerations for Mounting Applications Circuits ADXRS450 Signal Chain Timing SPI Communication Protocol Command/Response SPI Communications Characteristics SPI Applications Device Data Latching Command/Response—Bit Definitions SQ2 to SQ0 SM2 to SM0 A8 to A0 D15 to D0 SPI ST1 to ST0 P P0 P1 RE DU Fault Register Bit Definitions PLL Q NVM POR PWR CST CHK OV UV Fail Amp K-Bit Assertion: Recommended Start-Up Routine SPI Rate Data Format Memory Map and Registers Memory Map Memory Register Definitions Rate Registers Temperature (TEMx) Registers Low CST (LOCST) Memory Registers High CST (HICST) Memory Registers Quad Memory Registers Fault Registers Part ID (PID) Registers Serial Number (SN) Registers Dynamic Null Correction (DNC) Registers Package Orientation and Layout Information Package Marking Codes Outline Dimensions Ordering Guide